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| author | Jakub Kicinski <kuba@kernel.org> | 2026-08-05 19:00:33 -0700 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2026-08-05 19:00:34 -0700 |
| commit | 59d3b0a5f1110415feaf8981e07f73e639fd1fae (patch) | |
| tree | 652b611e40144392fba4a576e298c59f472e6957 /tools/perf/scripts/python/bin | |
| parent | eaebed6b2f50d8cf230af1b536a752e5bf512633 (diff) | |
| parent | 24e4aff8983fe663a85b5b157476f87ae0819e2c (diff) | |
Merge branch 'dpll-zl3073x-add-microchip-zl30643-support'
Vincent Jardin says:
====================
dpll: zl3073x: add Microchip ZL30643 support
The Microchip ZL30643 (chip ID 0x0E3B) is a 3 DPLL channel member of
the ZL3064x timing family, register compatible with the
ZL30733 of the ZL3073x family.
Patch 1 describes it in the binding as a fallback to the register-
equivalent microchip,zl30733.
Patch 2 adds the 0x0E3B runtime chip-ID table entry; no new match
strings, the fallback binds via the existing microchip,zl30733
entry.
====================
Link: https://patch.msgid.link/20260730-for-upstream-zl30643-v2-0-0ea0bbd03755@free.fr
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions