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authorBaochen Qiang <baochen.qiang@oss.qualcomm.com>2026-01-12 15:36:23 +0800
committerJeff Johnson <jeff.johnson@oss.qualcomm.com>2026-01-15 17:19:39 -0800
commit1f165022d5f06a420a2257d7c38e3d19e16ef071 (patch)
tree2faf995a181951e48d68ff102e41316ca4e05ee6 /tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git
parent9615a6727e9d836e60dd4c7442bc8c16f0382203 (diff)
wifi: ath12k: refactor REO status ring handling
The entry of REO status ring of existing chips has a 64 bit TLV header, hence below functions take a 64 bit TLV assumption by default ath12k_wifi7_dp_rx_process_reo_status() ath12k_wifi7_hal_reo_status_queue_stats() ath12k_wifi7_hal_reo_flush_queue_status() ath12k_wifi7_hal_reo_flush_cache_status() ath12k_wifi7_hal_reo_unblk_cache_status() ath12k_wifi7_hal_reo_flush_timeout_list_status() ath12k_wifi7_hal_reo_desc_thresh_reached_status() ath12k_wifi7_hal_reo_update_rx_reo_queue_status() However this is not the case for QCC2072 of which the TLV is 32 bit. Refactor above functions to prepare for QCC2072 support, this is done by removing TLV length assumption and offloading TLV decoding work to a newly added callback _reo_status_dec_tlv_hdr. This way each chip can register its own handler hence can do the work accordingly. Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c5-00302-QCAHMTSWPL_V1.0_V2.0_SILICONZ-1.115823 Signed-off-by: Baochen Qiang <baochen.qiang@oss.qualcomm.com> Reviewed-by: Vasanthakumar Thiagarajan <vasanthakumar.thiagarajan@oss.qualcomm.com> Link: https://patch.msgid.link/20260112-ath12k-support-qcc2072-v2-3-fc8ce1e43969@oss.qualcomm.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
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