diff options
| author | Dapeng Mi <dapeng1.mi@linux.intel.com> | 2026-05-15 14:11:33 +0800 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2026-05-19 13:49:02 +0200 |
| commit | acc41cdcb091453f48381d1c0d2e76b63c9d985f (patch) | |
| tree | 19b5f6e71b7c505f6b95d7c10c7d736edd8303d4 /rust/kernel/alloc | |
| parent | 5c3cdc74af25fc7f64a3ed260b4f6eb8313a3b75 (diff) | |
perf/x86/intel: Update event constraints and cache_extra_regsfor ICX
Update perf hard-coded event constraints and cache_extra_regs[] for
Icelake server according to the latest ICX perfmon events (v1.30).
Since the value of cache extra registers differs with previous
generations, introduce new snc_hw_cache_extra_regs[] to represent the
value of extra registers on ICX.
ICX perfmon events:
https://github.com/intel/perfmon/blob/main/ICX/events/icelakex_core.json
Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://patch.msgid.link/20260515061143.338553-2-dapeng1.mi@linux.intel.com
Diffstat (limited to 'rust/kernel/alloc')
0 files changed, 0 insertions, 0 deletions