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| author | Biju Das <biju.das.jz@bp.renesas.com> | 2025-11-29 16:43:08 +0000 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-12-17 15:07:07 +0100 |
| commit | 4cb2bd1bf41a0d6dbe1fc4bf8d8f83f40b914572 (patch) | |
| tree | 62fcf50dfc41c3aef8cc4091c6577d77a1bab1ca /rust/alloc/collections/git@git.tavy.me:linux.git | |
| parent | d53f4aa9edaafda28e426d8e5eda7dc50f7ca94e (diff) | |
serial: sh-sci: Add RSCI_PORT_SCIF32 port ID
The RZ/G3E RSCI IP has 32-stage FIFO compared to 16-stage FIFO on RZ/T2H.
Add RSCI_PORT_SCIF32 port ID to differentiate it from RZ/T2H RSCI and
update sci_is_rsci_type() and sci_is_fifo_type()
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://patch.msgid.link/20251129164325.209213-13-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'rust/alloc/collections/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions