Merge tag 'renesas-clk-for-v7.3-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

 - Add RTC and display clocks on RZ/T2H and RZ/N2H
 - Add audio and display clocks and resets on RZ/G3E
 - Add SDHI, GPU, and USB2.0 clocks and resets on RZ/G3L
 - Update the maintainer for the VersaClock 7 driver
 - Add CAN-FD clocks and resets for RZ/G3S

* tag 'renesas-clk-for-v7.3-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: r9a08g045: Add clocks and resets for CAN-FD
  dt-bindings: clock: renesas,versaclock7: Update maintainer
  clk: renesas: r9a09g047: Add LVDS clocks and resets
  clk: renesas: r9a09g077: Add LCDC and PLL3 clock support for RZ/T2H display pipeline
  clk: renesas: rzv2h-cpg: Extract PLL calculation helpers into shared library
  clk: renesas: rzv2h-cpg: Use per-SoC PLL reference frequency for calculations
  clk: renesas: r9a08g046: Add USB2.0 clock and reset entries
  clk: renesas: r9a09g077: Add RTC clocks
  clk: renesas: cpg-mssr: Implement dedicated MSTP delay logic for RZ/T2H LCDC and RTC
  clk: renesas: r9a08g046: Add clock and reset entries for GE3D
  clk: renesas: r9a08g046: Add clock and reset entries for SDHI
  clk: renesas: r9a09g047: Add audio clock and reset support
  dt-bindings: clock: renesas: Add audio clock inputs for RZ/V2H family
  dt-bindings: clock: renesas,r9a09g077/87: Add PCLKRTC clock ID
  dt-bindings: clock: renesas,r9a09g077/87: Add LCDC_CLKD clock ID

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