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| author | Henner Zeller <h.zeller@acm.org> | 2022-08-03 09:20:54 -0700 |
|---|---|---|
| committer | Henner Zeller <h.zeller@acm.org> | 2022-08-28 16:35:55 -0700 |
| commit | 5f90d90447d0d4867adf103de55e9893afa62c25 (patch) | |
| tree | 5bece880dfe5cd4b0e0531247fd3ae5bbf10db6b /pkgs/development/python-modules/python-mapnik/python-mapnik_std_optional.patch | |
| parent | 3a6d655479f3e4199df80aa65e5fda1010527f68 (diff) | |
verible: init at 0.0-2172-g238b6df6
Verible is a suite of SystemVerilog developer tools, including a parser,
style-linter, formatter, and language server.
Signed-off-by: Henner Zeller <h.zeller@acm.org>
Diffstat (limited to 'pkgs/development/python-modules/python-mapnik/python-mapnik_std_optional.patch')
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