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Iterations: 100
Instructions: 1200
Total Cycles: 509
Total uOps: 1200
Dispatch Width: 4
uOps Per Cycle: 2.36
IPC: 2.36
Block RThroughput: 4.0
Instruction Info:
[1]: #uOps
[2]: Latency
[3]: RThroughput
[4]: MayLoad
[5]: MayStore
[6]: HasSideEffects (U)
[1] [2] [3] [4] [5] [6] Instructions:
1 1 0.33 mov rax, rdi
1 5 0.50 * mov rcx, qword ptr [rsi]
1 5 0.50 * mov rdx, qword ptr [rsi + 8]
1 5 0.50 * mov rsi, qword ptr [rsi + 16]
1 1 0.50 lea rdi, [rcx + 2*rsi]
1 1 0.33 add rdi, 4
1 1 0.33 sub rdx, rsi
1 1 1.00 * mov qword ptr [rax], rcx
1 1 1.00 * mov qword ptr [rax + 8], rsi
1 1 1.00 * mov qword ptr [rax + 16], rdi
1 1 1.00 * mov qword ptr [rax + 24], rdx
1 1 1.00 U ret
Resources:
[0] - SBDivider
[1] - SBFPDivider
[2] - SBPort0
[3] - SBPort1
[4] - SBPort4
[5] - SBPort5
[6.0] - SBPort23
[6.1] - SBPort23
Resource pressure per iteration:
[0] [1] [2] [3] [4] [5] [6.0] [6.1]
- - 1.66 1.66 4.00 1.68 3.50 3.50
Resource pressure by instruction:
[0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
- - 0.34 0.33 - 0.33 - - mov rax, rdi
- - - - - - 0.49 0.51 mov rcx, qword ptr [rsi]
- - - - - - 0.51 0.49 mov rdx, qword ptr [rsi + 8]
- - - - - - 0.01 0.99 mov rsi, qword ptr [rsi + 16]
- - 0.33 0.67 - - - - lea rdi, [rcx + 2*rsi]
- - 0.63 0.34 - 0.03 - - add rdi, 4
- - 0.36 0.32 - 0.32 - - sub rdx, rsi
- - - - 1.00 - 0.50 0.50 mov qword ptr [rax], rcx
- - - - 1.00 - 0.50 0.50 mov qword ptr [rax + 8], rsi
- - - - 1.00 - 0.98 0.02 mov qword ptr [rax + 16], rdi
- - - - 1.00 - 0.51 0.49 mov qword ptr [rax + 24], rdx
- - - - - 1.00 - - ret
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