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path: root/drivers/gpu/drm/amd/include/asic_reg
AgeCommit message (Expand)Author
2026-06-03drm/amd: Add register header files for DCN42BMatthew Stewart
2026-05-11drm/amdgpu/vpe: add new vpe v2.0.0 register offset and sh/maskCaden Chien
2026-05-11drm/amd/display: Add FRL registers for DCN316Rodrigo Siqueira
2026-05-11drm/amd/display: Add FRL registers for DCN315Rodrigo Siqueira
2026-05-11drm/amd/display: Add FRL register for DCN303Rodrigo Siqueira
2026-05-11drm/amd/display: Add FRL register for DCN302Rodrigo Siqueira
2026-05-11drm/amd/display: Add the necessary FRL registers for DCN314Rodrigo Siqueira
2026-05-11drm/amd/display: Introduce FRL registers for DCN32Rodrigo Siqueira
2026-05-11drm/amd/display: Add FRL registers for DCN321Rodrigo Siqueira
2026-05-11drm/amd/display: Add required FRL registers for DCN31Rodrigo Siqueira
2026-05-11drm/amd/display: Add FRL registers for DCN30Rodrigo Siqueira
2026-04-24drm/amdgpu: Add nbio v6_3_2 ip headers v4Hawking Zhang
2026-04-17drm/amdgpu: Add gc v12_1_0 ip headers v6Bing Ma
2026-04-17drm/amdgpu: Add gc v12_1_1 ip headers v3Bing Ma
2026-03-23drm/amd/display: Update underflow detection for DCN42Roman Li
2026-03-11drm/amdgpu: Add lsdma v7_1_0 ip headersLikun Gao
2026-03-11drm/amd/display: Sync dcn42 with DC 3.2.373Roman Li
2026-03-11drm/amd/display: Enable dcn42 DC clk_mgrRoman Li
2026-03-04drm/amdgpu/psp: Use Indirect access address for GFX to PSP mailboxsguttula
2026-02-23drm/amd/display: Add dcn42 register headersRoman Li
2026-01-08drm/amdgpu: Add THM 15.0.0 headersAlex Deucher
2026-01-08drm/amdgpu: add SMUIO 15.0.0 headersAlex Deucher
2026-01-05drm/amd/amdgpu: Port over some missing registers and bits from GC 10.1 to 10....Tom St Denis
2026-01-05drm/amdgpu: RLC-G VF Register Access InterfaceBokun Zhang
2026-01-05drm/amdgpu: add MP 15.0.0 headersAlex Deucher
2026-01-05drm/amdgpu: add VCN 5.3.0 headersAlex Deucher
2025-12-08drm/amdgpu: Add gc v12_1_0 ip headers v4Hawking Zhang
2025-12-08drm/amdgpu: Add osssys v7_1_0 ip headers v3Hawking Zhang
2025-12-08drm/amdgpu: Add mmhub v4_2_0 ip headers v5Hawking Zhang
2025-12-08drm/amdgpu: Add mp v15_0_8 ip headers v4Hawking Zhang
2025-12-08drm/amdgpu: Add smuio v15_0_8 ip headers v4Hawking Zhang
2025-11-11drm/amdgpu/vce1: Clean up register definitionsTimur Kristóf
2025-10-07drm/amdgpu: Add additional DCE6 SCL registersAlex Deucher
2025-05-28drm/amd/display: Add some missing register headers for DCN401Aurabindo Pillai
2025-05-22drm/amdgpu: Add jpeg poison status regMangesh Gadre
2025-05-22drm/amdgpu: Add vcn poison status regMangesh Gadre
2025-05-13drm/amdgpu: add vcn v5_0_0 ip headersfanhuang
2025-04-07drm/amdgpu: add missing SMU6 defines, shifts and masksAlexandre Demers
2025-04-07drm/amdgpu: keep removing sid.h dependency from si_dma.cAlexandre Demers
2025-04-07drm/amdgpu: add missing GFX6 definesAlexandre Demers
2025-04-07drm/amdgpu: add missing DMA defines, shifts and masksAlexandre Demers
2025-04-07drm/amdgpu: use proper defines, shifts and masks in DCE6 codeAlexandre Demers
2025-03-07drm/amdkfd: Add support for more per-process flagHarish Kasiviswanathan
2025-03-07drm/amd/amdgpu: Add missing GC 11.5.0 registerTom St Denis
2025-02-19drm/amdgpu: Add JPEG4_0_3 core reset control regSathishkumar S
2025-02-12drm/amdgpu: Set snoop bit for SDMA for MI seriesHarish Kasiviswanathan
2025-02-12drm/amd/display: Add dcn36 register header filesWayne Lin
2025-02-12drm/amdgpu: Add VCN v4.0.3 RRMT register offsetLijo Lazar
2024-12-10drm/amdgpu: rename register headers to dcn_2_0_1Leo Li
2024-12-10drm/amdgpu: Add umc v8_14_0 ip headersCandice Li
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