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path: root/drivers/gpu/drm/amd/display/dc/dsc/dcn20
AgeCommit message (Expand)Author
2026-05-11drm/amd/display: Fix warningsClay King
2026-05-05drm/amd/display: Fix type mismatches using guards and explicit castsGaghik Khachatrian
2026-04-17drm/amd/display: Fix narrowing boundaries and eDP parser assignmentGaghik Khachatrian
2026-04-17drm/amd/display: Fix implicit narrowing conversion warningsGaghik Khachatrian
2026-04-17drm/amd/display: Rework YCbCr422 DSC policyRelja Vojvodic
2026-03-30Revert "drm/amd/display: Rework YCbCr422 DSC policy"Relja Vojvodic
2026-03-23drm/amd/display: Rework YCbCr422 DSC policyRelja Vojvodic
2025-10-28drm/amd/display: Add more DC HW state info to underflow loggingKaren Chen
2025-10-13drm/amd/display: Correct slice width calculation for YCbCr420Relja Vojvodic
2025-09-15drm/amd/display: Add DSC padding for OVT SupportRelja Vojvodic
2025-05-05drm/amd/display: Refactoring DSC enum dsc_bits_per_comp.Bhuvanachandra Pinninti
2024-06-27drm/amd/display: Adjust reg field for DSC wait for disconnectRyan Seto
2024-06-27drm/amd/display: Reset DSC memory statusDuncan Ma
2024-05-08drm/amd/display: reset DSC clock in post unlock updateWenjing Liu
2024-04-26drm/amd/display: Add some DCN401 reg name to macro definitionsAurabindo Pillai
2023-11-29drm/amd/display: Refactor DSC into component folderBhuvana Chandra Pinninti
generated by cgit v1.2.3 (git 2.25.1) at 2026-09-07 16:51:24 +0000