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36 hoursMerge tag 'kmalloc_obj-v7.3-rc2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux Pull kmalloc_obj conversions from Kees Cook: "Another run of the Coccinelle script for converting kmalloc() family of allocations to kmalloc_obj() via the existing rules in scripts/coccinelle/api/kmalloc_objs.cocci" * tag 'kmalloc_obj-v7.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux: treewide: refresh kmalloc_obj() conversions drm/amd/display: Fix harmless type mismatch in allocation
2 daystreewide: refresh kmalloc_obj() conversionsKees Cook
This is another run of the Coccinelle script for converting kmalloc() family of allocations to kmalloc_obj() via the existing rules in scripts/coccinelle/api/kmalloc_objs.cocci This catches both the set of kmalloc() uses added since the first kmalloc_obj() conversions in v7.0 and adds a large group missed in the first pass due to Coccinelle not interacting well with the cleanup.h scoped_...() family of macros[1]. I worked around this with spatch's "--macro-file" argument to a file with all the scoped_...() macros mapped to Coccinelle's YACFE_ITERATOR[2] as that was the closest viable control flow indicator I could find. Build tested allmodconfig on x86, arm64, arm, loongarch, mips, powerpc, riscv, and s390 with no new warnings. Link: https://lore.kernel.org/lkml/202609021314.8A9C0B8@keescook/ [1] Link: https://github.com/coccinelle/coccinelle/blob/master/standard.h [2] Signed-off-by: Kees Cook <kees+treewide@kernel.org>
3 daysMerge tag 'amd-drm-fixes-7.3-2026-09-03' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/amdgpu/kernel into drm-fixes amd-drm-fixes-7.3-2026-09-03: amdgpu: - SR-IOV fix - GFX8 fix - MES queue reset fix - GPUVM fixes - DCN 6 warning fix - DCN 3.5/3.6 fix - DML fix - Backlight fix - Colorop fix - DC get_estimated_bw() fix - devcoredump fix - Userq fixes - APU PSP fix - Cursor fix amdkfd: - MES queue eviction fix - MQD debugfs fix UAPI: - Fix for drm_amdgpu_info_device with mixed 64 bit kernel and 32 bit userspace Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patch.msgid.link/20260903174712.584320-1-alexander.deucher@amd.com
4 daysdrm/amd/display: use plane color_mgmt_changed to track colorop changesMelissa Wen
This is a resubmission of commit d79716401a95 ("drm/amd/display: use plane color_mgmt_changed to track colorop changes") whose change was reverted by commit 0461ba9a7994 ("Merge tag 'amd-drm-next-7.3-2026-07-02' of https://gitlab.freedesktop.org/agd5f/linux into drm-next") during a merge conflict resolution. Original commit message: ``` Ensure the driver tracks changes in any colorop property of a plane color pipeline by using the same mechanism of CRTC color management and update plane color blocks when any colorop property changes. It fixes an issue observed on gamescope settings for night mode which is done via shaper/3D-LUT updates. ``` Fixes: 0461ba9a7994 ("Merge tag 'amd-drm-next-7.3-2026-07-02' of https://gitlab.freedesktop.org/agd5f/linux into drm-next") Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Melissa Wen <mwen@igalia.com> Link: https://patch.msgid.link/20260807115712.22423-1-mwen@igalia.com
5 daysdrm/amd/display: Fix backlight control for luminance-capable OLEDRoman Li
[WHY] For some eDP panels VESA aux backlight control is necessary, otherwise they stay black. [HOW] When AUX backlight control is used, select BACKLIGHT_CONTROL_VESA_AUX for panels that advertise panel_luminance_control. Reviewed-by: Hansen Dsouza <hansen.dsouza@amd.com> Signed-off-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 42f698bd061d76d5f4c84a195e465cfbeec775e4)
5 daysdrm/amd/display: advertise PIXEL_NONE and PREMULTI blend mode for DCEMelissa Wen
DCE can support PREMULTI and COVERAGE blend mode depending on its generation, however current driver implementation either doesn't expose more than primary and cursor plane, or doesn't program registers for any blend mode other than PIXEL_NONE. To fix the missing-blend-mode-prop warning according to current DCE plane caps, create blend mode property with PIXEL_NONE and PREMULTI for primary planes. As long as the background is black and there is no overlay plane, PIXEL_NONE and PREMULTI are equivalent, and PREMULTI has been the mandatory/default mode for years, so keep it to avoid regressions. Fixes: 860e748bddcc ("drm: ensure blend mode supported if pixel format with alpha exposed") Tested-by: Viktor Jägersküpper <viktor_jaegerskuepper@freenet.de> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> #v3 Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Reviewed-by: Leandro Ribeiro <leandro.ribeiro@collabora.com> #v2 Signed-off-by: Melissa Wen <mwen@igalia.com> Link: https://patch.msgid.link/20260826104143.39077-4-mwen@igalia.com
5 daysdrm/amd/display: fix missing blend-mode-prop warning for DCNMelissa Wen
validate_blend_mode_for_alpha_formats() warns when a plane supports formats with alpha but doesn't expose the blend mode property. Fix this by adding the same overlay plane blend modes to primary plane, since they are all universal planes in DCN-generation. Cursor planes support ARGB8888 format and CURSOR_MODE_COLOR_PRE_MULTIPLIED_ALPHA is set by default (other color formats are not implemented), so only expose support to PREMULTI, which is the default blend mode on DRM. Fixes: 860e748bddcc ("drm: ensure blend mode supported if pixel format with alpha exposed") Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Reviewed-by: Leandro Ribeiro <leandro.ribeiro@collabora.com> Signed-off-by: Melissa Wen <mwen@igalia.com> Link: https://patch.msgid.link/20260826104143.39077-3-mwen@igalia.com
13 daysdrm/amd/display: fix dc_lock leak on GPU reset error pathsLinkai Gong
On GPU reset, dm_suspend() takes dc_lock and leaves it for dm_resume() to drop. If amdgpu_dm_commit_zero_streams() or dm_dmub_hw_init() fails, the function returns with the lock still held. The matching resume path is then skipped, so every later dc_lock take hangs. Release the cached DC state and unlock before returning the error. Fixes: 3cf7a0bc87f0 ("drm/amd/display: Catch failures for amdgpu_dm_commit_zero_streams()") Fixes: 2b6943df5413 ("drm/amd/display: Pass up errors for reset GPU that fails to init HW") Cc: stable@vger.kernel.org Signed-off-by: Linkai Gong <gonglinkai@kylinos.cn> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
13 daysdrm/amd/display: Log details when failing to register HPD IRQTimur Kristóf
This should help diagnose HPD IRQ related issues in the future. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Link: https://patch.msgid.link/20260821215059.312868-2-timur.kristof@gmail.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-19drm/amd/display: validate plane degamma LUT size for private color propHarry Wentland
Unlike the CRTC degamma path, which is guarded by amdgpu_dm_verify_lut_sizes(), the per-plane degamma LUT size was never validated before use. __set_dm_plane_degamma() passed the user-supplied size straight into __is_lut_linear() and, for a non-linear LUT, into __set_input_tf() -> __drm_lut_to_dc_gamma(), the latter always iterating MAX_COLOR_LUT_ENTRIES entries regardless of the actual LUT size. A malformed AMD_PLANE_DEGAMMA_LUT blob (e.g. a single entry) could thus trigger a divide-by-zero in __is_lut_linear() or an out-of-bounds read in __drm_lut_to_dc_gamma(). Reject any plane degamma LUT whose size does not match MAX_COLOR_LUT_ENTRIES, mirroring the invariant the code already asserts a few lines below (and which the CRTC path enforces). The AMD_PLANE_DEGAMMA_LUT property is only exposed on builds with AMD_PRIVATE_COLOR defined. Fixes: 980f8710075a ("drm/amd/display: add plane degamma TF and LUT support") Cc: stable@vger.kernel.org Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Melissa Wen <mwen@igalia.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-19drm/amd/display: avoid divide-by-zero in __is_lut_linear()Harry Wentland
__is_lut_linear() computes the expected value of each entry with expected = i * MAX_DRM_LUT_VALUE / (size - 1); If it is ever called with a single-entry LUT, size - 1 is zero and the kernel takes a divide error (#DE). A LUT with fewer than two entries cannot describe a linear mapping anyway, so return false early instead of dividing by zero. Fixes: 086247a4b2fb ("drm/amd/display: Use 4096 lut entries") Cc: stable@vger.kernel.org Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Melissa Wen <mwen@igalia.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-19drm/amd/display: Scale custom brightness curve from full rangeAkhmed Zhitaev
Custom brightness curves use an 8-bit input signal. After exporting the full PWM range to userspace, the curve normalizer still divides requests by the physical PWM span. On panels with a nonzero minimum PWM level, this can produce a curve input greater than 255 and send an invalid backlight level to DC. Scale the userspace [0..max] range to the curve's [0..255] range instead. This retains the full advertised range and keeps the reverse readback conversion unchanged. Fixes: 8dbd72cb7900 ("drm/amd/display: Export full brightness range to userspace") Cc: stable@vger.kernel.org Signed-off-by: Akhmed Zhitaev <zhitaevakh@gmail.com> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> (Move to amdgpu_dm_backlight.c) Link: https://patch.msgid.link/20260813170959.22073-1-zhitaevakh@gmail.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-12drm/amd/display: make DC_RUN_WITH_PREEMPTION_ENABLED misuse a build errorMikhail Gavrilov
Inside an FPU compilation unit DC_FP_START() and DC_FP_END() are defined as BUILD_BUG(), so using them there fails the build. That was done on purpose by commit a574f53ed52e ("drm/amd/display: Permit DC_FP_START/END only in non-FP compilation units"). DC_RUN_WITH_PREEMPTION_ENABLED() was added later by commit 3539437f354b ("drm/amd/display: Move FPU Guards From DML To DC - Part 1") and defined as a plain pass-through in that same branch instead. A wrap placed inside an FPU compilation unit therefore compiles cleanly, reads as correct during review, and does nothing at all. This is not hypothetical. While chasing a "scheduling while atomic" splat in dc_create_plane_state() on PREEMPT_RT, an attempt to place the guard further up the call chain, in dml21_add_phantom_plane() in dc/dml2_0/dml21/dml21_utils.c, had no effect for exactly this reason: dc/dml2_0/Makefile applies CC_FLAGS_FPU to every object under that directory, and the top level Makefile adds -D_LINUX_FPU_COMPILATION_UNIT to CC_FLAGS_FPU. Define the macro as BUILD_BUG() there as well, so that the mistake is a compile error rather than a guard that silently does nothing. The code argument is kept in the expansion so the BUILD_BUG() failure is not accompanied by set-but-unused diagnostics for variables assigned inside it. No current user is affected. dc/core/dc_stream.c and dc/resource/dcn32/dcn32_resource.c are outside the dml directories, and dc/dml2_0/dml2_wrapper.c and dc/dml2_0/dml21/dml21_wrapper.c are built without the FPU flags because dc/dml2_0/Makefile replaces their CFLAGS with CC_FLAGS_NO_FPU and removes CC_FLAGS_FPU. Link: https://lore.kernel.org/all/1ead313022bc62dce1f42af9f855727eb9074443.camel@web.de/ Signed-off-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Reviewed-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-12drm/amd/display: Fix NULL pointer dereference in amdgpu_dm_crtc_set_vblank()Samuel Pitoiset
amdgpu_dm_crtc_set_vblank() dereferences acrtc_state->stream when vblank is enabled/queried from DRM_IOCTL_MODE_CRTC_GET_SEQUENCE before a stream is attached to it. BUG: kernel NULL pointer dereference, address: 0000000000000008 RIP: amdgpu_dm_crtc_set_vblank+0x6b/0x4d0 [amdgpu] Call Trace: drm_vblank_enable drm_vblank_get drm_crtc_get_sequence_ioctl drm_ioctl_kernel drm_ioctl Reproduced by running VKCTS with WSI tests enabled on RADV. Guard the enable path on acrtc_state->stream being non-NULL, matching the existing checks in this function. Fixes: 34d66bc7ff10 ("drm/amd/display: Fix Xorg desktop unresponsive on Replay panel") Reviewed-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Set native cursor mode for disabled CRTCs againTimur Kristóf
It was regressed by a refactor. Let's fix it again. Always set native cursor mode when the CRTC is disabled, to make sure it doesn't cause atomic commits to fail when they are trying to disable the CRTC. Fixes: 87a6dab12fc0 ("drm/amd/display: add cursor module") Cc: Alex Hung <alex.hung@amd.com> Reviewed-by: Ivan Lipski <ivan.lipski@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: allow self-refresh exit while entry is blockedDavid Weber
amdgpu_dm_crtc_set_static_screen_optimze() maps sso_enable to the Replay and PSR1 vsync events. allow_sr_entry is an entry gate, but the helper currently applies it to both directions. A non-fast update clears allow_sr_entry. During a modeset, a separate hardware-programming event keeps self-refresh blocked while the stream is reprogrammed. If vblank is enabled before the entry delay expires, the ISM calls the helper with sso_enable false. The early return drops the disable request, so the vsync events are not set. After enough fast commits, allow_sr_entry becomes true and the hardware-programming event can be cleared. Since the vblank reference remains held, there is no further zero-to-one vblank transition to restore the missing vsync events. Replay or PSR1 can then become active while vblank is still enabled. Gate only requests that enable static-screen optimization. Always process disable requests so a vblank requestor keeps Replay and PSR1 blocked. On a Phoenix system, repeated SDDM-to-VT handoffs produced stuck flips followed by flip_done and commit-wait timeouts. The timeout was not observed with this change applied. Fixes: 3c108046e1d6 ("drm/amd/display: Add power module on Linux") Assisted-by: Codex:gpt-5.6-sol Assisted-by: Claude:opus-5 Signed-off-by: David Weber <weber.aulendorf@gmail.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd: Disable DP audio spread spectrum for Cyan SkillfishTravis K. Bangs
The VBIOS for Cyan Skillfish devices (DCN201) indicates there is DisplayPort ref clock spread spectrum downspread, so the audio clock is corrected for it. However, the clock source in this hardware does not seem to actually be running with a clock downspread, so DisplayPort audio desyncs with video after several minutes. Ignore dprefclk SS downspread on CYAN_SKILLFISH2 asic. Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/5429 Signed-off-by: Travis K. Bangs <tbangs89@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Fix more KUnit connector use-after-free bugsAlex Hung
drmm_connector_init() and drmm_encoder_init() register their cleanup (drm_connector_cleanup() / drm_encoder_cleanup()) as DRM-managed actions tied to the drm_device lifetime. When the object memory is owned by KUnit, it is freed before that action runs, so the cleanup touches freed memory. Allocate these objects with drmm_kzalloc() so their lifetime matches the cleanup action. Signed-off-by: Alex Hung <alex.hung@amd.com> Assisted-by: Copilot:Claude-Opus-4.8 Acked-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Configure all CRC engines in pipe CRC source pathWayne Lin
Iterate every CRC engine instance when enabling or disabling the pipe CRC source so DCN31x OTG_CRC1_EN is handled alongside OTG_CRC_EN, matching the legacy shared enable behavior used by DisplayCRC multi-ROI. Reviewed-by: ChiaHsuan (Tom) Chung <chiahsuan.chung@amd.com> Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Cover crtc destroy_state stream releaseBhawanpreet Lakha
Add dm_test_crtc_destroy_state_releases_stream to cover the cur->stream branch of amdgpu_dm_crtc_destroy_state(), complementing the existing no-stream test. The test attaches a DC stream to the CRTC state and takes an extra stream reference so the destroy path drops back to the KUnit-managed reference instead of freeing the stream, then verifies exactly one reference was released. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Cover crtc vblank restore replay-supported pathBhawanpreet Lakha
Add dm_test_crtc_enable_vblank_ips_restore_replay to cover the pr->config.replay_supported side of the sr_supported OR in amdgpu_dm_crtc_set_vblank(). The existing IPS restore test establishes self-refresh support via the PSR version. This test instead marks the PSR version unsupported and sets replay_supported, forcing the sr_supported computation to fall through to the replay branch while still calling drm_crtc_vblank_restore(). Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Cover crtc vblank IPS self-refresh restoreBhawanpreet Lakha
Add dm_test_crtc_enable_vblank_ips_restore to cover the IPS/self-refresh branch of amdgpu_dm_crtc_set_vblank() that calls drm_crtc_vblank_restore(). The test primes the DC with ips_support set and IPS not fully disabled, a supported PSR version (self-refresh supported) and an immediate-disable vblank config, so all four conditions gating the restore hold. A stub get_vblank_timestamp hook is installed on the CRTC so the restore helper passes its sanity check, and the enable path then runs to completion. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Cover crtc set_vblank workqueue branchBhawanpreet Lakha
Add dm_test_crtc_enable_vblank_queues_work and dm_test_crtc_disable_vblank_queues_work to cover the vblank_control_workqueue branch of amdgpu_dm_crtc_set_vblank(): - The enable test installs a real workqueue, retains the stream and queues the control worker, then drains it and checks the active vblank IRQ count was incremented. - The disable test drives the no-stream sub-branch (the stream-retain is skipped) and checks the worker decremented the count. Both seed the ISM so the queued worker takes no state-machine transition, keeping coverage on the vblank accounting; the ISM state machine itself is covered by the ISM tests. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Add KUnit tests for crtc set_vblankBhawanpreet Lakha
Add coverage for the amdgpu_dm_crtc_set_vblank() paths reached through amdgpu_dm_crtc_enable_vblank() and amdgpu_dm_crtc_disable_vblank(): - dm_test_crtc_enable_vblank_full_path: VRR-active enable that walks the vupdate-irq branch and acquires the crtc/pageflip IRQ references. - dm_test_crtc_enable_vblank_vupdate_busy: vupdate IRQ rejection aborts the enable with -EBUSY. - dm_test_crtc_enable_vblank_crtc_irq_error: crtc IRQ acquire failure aborts the enable with -ENOENT. - dm_test_crtc_enable_vblank_in_reset: an in-progress GPU reset returns early before the vblank workqueue branch. - dm_test_crtc_disable_vblank_vrr: the VRR disable path turns the vupdate IRQ off and releases both IRQ references. Add shared IRQ-source stubs and setup helpers so amdgpu_irq_get()/put() succeed without hardware access. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Unify force_yuv debugfs into force_yuv_pixel_formatIvan Lipski
[Why] The connector exposed a single force_yuv420_output boolean debugfs and carried force_yuv420_output / force_yuv422_output boolean fields to force a chroma encoding. This cannot express "force RGB" or "force YCbCr444", and diverges from the upstream amdgpu_dm which uses a single force_yuv_pixel_format field keyed on enum dc_pixel_encoding. [How] - Replace the two boolean fields with a single uint8_t force_yuv_pixel_format holding an enum dc_pixel_encoding value (PIXEL_ENCODING_UNDEFINED == no override). - Replace the force_yuv420_output boolean debugfs with a read/write force_yuv_pixel_format file that takes the encoding directly (1=RGB, 2=YCbCr422, 3=YCbCr444, 4=YCbCr420), validated against PIXEL_ENCODING_COUNT. - Convert the existing readers/writers in amdgpu_dm_connector.c to the new field, preserving current behaviour. - Add YCbCr444 force support now that the field can express it. v2: Merge with changed from drm-misc (Alex) Assisted-by: Copilot:claude-opus-4.8 Reviewed-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Refactor stream validationIvan Lipski
[Why] amdgpu_dm_create_validate_stream_for_sink() drove its RGB -> YUV422 -> YUV420 chroma fallback by recursing and toggling the shared aconnector->force_yuv420_output / force_yuv422_output fields, resetting them after each recursive call. Those fields have no locking and the function runs concurrently on the same connector from two paths: the connector probe worker (->mode_valid) and a compositor's atomic check (dm_update_crtc_state). When both run at once, one thread can clear the override just before the other tests its exit condition, so the exit is missed and validation loops indefinitely, hanging the modeset path. [How] - Replace the recursion with an explicit loop over the chroma encodings wrapping the existing bpc walk. - Carry the encoding/bpc selection on the stack, passed by value into create_stream_for_sink() / fill_stream_properties_from_drm_display_mode(), instead of mutating shared connector state. - Derive the supported encodings and bit depths into bitmaps and drive validation from them, gating each candidate on the sink's advertised capability so unsupported encodings are never retried. - Move encoding selection entirely to the caller and pass the chosen dc_pixel_encoding into fill_stream_properties_from_drm_display_mode(). v2: sqaush in KUnit test fixes, merge with drm-misc changes (Alex) Assisted-by: Copilot:claude-opus-4.8 Reviewed-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Add KUnit tests for crtc set_static_screen_optimzeBhawanpreet Lakha
Add dm_test_crtc_set_static_screen_optimze_sr_entry_psr and dm_test_crtc_set_static_screen_optimze_psr_su_skips to cover the allow_sr_entry == true path of amdgpu_dm_crtc_set_static_screen_optimze(): the replay/PSR event updates when psr_version < DC_PSR_VERSION_SU_1, and skipping the PSR event update when psr_version is DC_PSR_VERSION_SU_1. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Add KUnit tests for crtc set_vupdate_irqBhawanpreet Lakha
Add dm_test_crtc_set_vupdate_irq_dc_busy and dm_test_crtc_set_vupdate_irq_enable to cover the previously untested paths in amdgpu_dm_crtc_set_vupdate_irq() where an OTG instance is assigned: dc_interrupt_set() failing (returns -EBUSY) and succeeding via a mock IRQ service (returns 0 for enable and disable). Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Add KUnit test for crtc vblank event completionBhawanpreet Lakha
Add dm_test_crtc_handle_vblank_completes_cursor_only to cover the previously untested branch in amdgpu_dm_crtc_handle_vblank() where a pending event with pflip_status != AMDGPU_FLIP_SUBMITTED (a cursor-only commit) is signalled: the vblank event is sent, the vblank reference is dropped, and acrtc->event is cleared. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Add active plane count tests for crtcBhawanpreet Lakha
Expose amdgpu_dm_crtc_count_crtc_active_planes() for KUnit and add tests covering the empty plane list and the mixed case exercising the mask filter, cursor skip, missing plane state, and framebuffer presence branches. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Add idle worker tests for crtcBhawanpreet Lakha
Expose amdgpu_dm_idle_worker() for KUnit and add tests covering the disabled exit, both loop break paths, and the enable-body path. Add dm_kunit_alloc_dc_state() and dm_kunit_alloc_clk_mgr() helpers to support the new tests. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Add vblank handling tests for crtcBhawanpreet Lakha
Add KUnit coverage for the CRTC vblank paths: - amdgpu_dm_crtc_handle_vblank: no-event completion and the AMDGPU_FLIP_SUBMITTED guard that keeps a pending event pending. - amdgpu_dm_crtc_vblank_control_worker: enable increments, disable decrements, and disable clamps the active vblank IRQ count at zero. - amdgpu_dm_crtc_disable_vblank: disable path returns cleanly when the IRQ subsystem is not installed. Expose amdgpu_dm_crtc_vblank_control_worker for KUnit via STATIC_IFN_KUNIT/EXPORT_IF_KUNIT and declare it in the header. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Add KUnit tests for more crtc functionsBhawanpreet Lakha
Expand KUnit coverage for amdgpu_dm_crtc.c with tests for functions that are easy to exercise in isolation: - amdgpu_dm_crtc_set_static_screen_optimze(): the !allow_sr_entry early return. - amdgpu_dm_crtc_enable_vblank(): rejection with -EINVAL when enabling vblank on an unconfigured CRTC. - amdgpu_dm_crtc_update_crtc_active_planes(): the no-stream branch that resets active_planes to zero. - amdgpu_dm_crtc_duplicate_state(): DM-specific fields are carried over. - amdgpu_dm_crtc_reset_state(): a fresh state is allocated and installed. - amdgpu_dm_crtc_destroy_state(): a stream-less state is freed cleanly. Expose amdgpu_dm_crtc_destroy_state(), amdgpu_dm_crtc_duplicate_state(), amdgpu_dm_crtc_reset_state() and amdgpu_dm_crtc_update_crtc_active_planes() to the tests via STATIC_IFN_KUNIT/EXPORT_IF_KUNIT. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Fix wb_info leak and NULL deref in writebackAlex Hung
[WHAT] dc_stream_add_writeback() copies wb_info by value, so free it on all paths via a single cleanup label. Also bail out early when no pipe_ctx matches the stream to avoid a NULL pointer dereference. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Gate HDMI FRL status polling on active FRL link rateFangzhi Zuo
[Why] hdmi_frl_status_polling_work() skipped any link whose connector_signal was not SIGNAL_TYPE_HDMI_FRL. connector_signal is not reliably set to SIGNAL_TYPE_HDMI_FRL while a link is actually running FRL, so links that were operating in FRL mode were skipped and their status flags never got polled, missing link-retrain events. [How] Use frl_link_settings.frl_link_rate to decide whether a link is running FRL. A non-zero rate means FRL is active, so only links with a zero rate are skipped. This ensures every link actually operating in FRL mode is polled for status changes. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Bounds-check connector->index in dm_dp_mst_get_modesHarry Wentland
dm_dp_mst_get_modes() uses drm_connector->index to index the per-connector HDCP arrays in struct hdcp_workqueue. Those arrays are sized to AMDGPU_DM_MAX_DISPLAY_COUNT, which matches the DRM connector index range (0..31). Add a defensive bounds check so that, should the DRM connector index range ever grow beyond the array size, the access is skipped instead of reading and writing out of bounds. Assisted-by: Copilot:claude-opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Resize MST HDCP per-connector arrays to 32Harry Wentland
AMDGPU_DM_MAX_DISPLAY_INDEX is 31. It suggest a maximum number of 32 connectors. But the way it's used is like MAX_DISPLAY_COUNT. Hence we're off by one with DRM core, which supports a max of 32 connectors. Rename AMDGPU_DM_MAX_DISPLAY_INDEX to AMDGPU_DM_MAX_DISPLAY_COUNT to match its actual use, and increase the size to 32 to match the originally intended size. Fixes: 82986fd631fa ("drm/amd/display: save restore hdcp state when display is unplugged from mst hub") Assisted-by: Copilot:claude-opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Remove duplicate in tests/MakefileRoman Li
The duplicate amdgpu_dm_plane_test.o entry causes linker errors during the arm-64 build. Reviewed-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-08-06drm/amd/display: Enable DCN6 sources compilationAurabindo Pillai
- Add hooks in various entry points to perform hw/sw init for DCN6 asic - Add dependent changes needed to enable DCN6 asic - Update the Makefiles so that DCN6 related newly added sources are compiled Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Ivan Lipski <ivan.lipski@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-29drm/amd/display: Exit idle optimizations before programmingLeo Li
[Why] We need to exit PSR/IPS before programming. Before calling DC for programming in amdgpu_dm_commit_planes(), there's a vblank_control_workqueue flush. This waits for IPS and PSR exit. (See drm_vblank_on/off() > amdgpu_dm_crtc_set_vblank() --queue_work()-> amdgpu_dm_crtc_vblank_control_worker()) Prior to the tagged "Fixes:" change, drm_vblank_get() was called before the workqueue flush. This ordering ensures that PSR exit occurred before programming. After the "Fixes:" change, drm_vblank_get() is called after the workqueue flush, leading to programming while idle optimizations are still active. This can lead to incorrect flip_pending detection used by vblank event delivery. [How] Split the vblank_get() component of `dm_arm_vblank_event()` into `dm_arm_vblank_event_pre_programming()`, which is called before programming. Call it before the vblank_control_workqueue flush. Includes a drive-by cleanup of prepare_flip_isr(): the only caller is dm_arm_vblank_event() and it's simple enough to roll-in. v2: Fix checkpatch formatting warning on drm_arm_vblank_event_pre_programming() arg alignment. Fixes: f64a9be56536 ("drm/amd/display: check GRPH_FLIP status before sending event") Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/4141#note_3583205 Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/5527 Assisted-by: Codex:gpt-5.6-sol Assisted-by: Claude:opus-5 Suggested-by: David Weber <weber.aulendorf@gmail.com> Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Don't use tiling flags anymoreTimur Kristóf
All supported GPU generations now support DRM format modifiers. Remove all code from amdgpu_dm that dealt with tiling flags. Note that the legacy non-DC display code still relies on tiling flags, so we can't remove them outside of DC until we also remove the legacy display code. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Tested-by: Link Mauve <linkmauve@linkmauve.fr> Tested-by: Nikola Medić <nmedic89@gmail.com> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Reviewed-by: Marek Olšák <maraeo@gmail.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Support DRM format modifiers on GFX6-8Timur Kristóf
Expose displayable DRM format modifiers based on which tiling modes are supported by the GFX block. Technically, DCE (Display Controller Engine) could support all possible permutations of all parameters independently of what GFX supports, with the limitation that it can only display LINEAR images and the displayable micro tiling mode (MICROTILE == DISPLAY). It doesn't make sense to expose all possible permutations of macro tiling modes, so let's just expose what the GFX block of the current chip supports. The following modes will be advertised: - 2D_TILED_THIN1 + DISPLAY + macrotile params [1] - 1D_TILED_THIN1 + DISPLAY - LINEAR [1] The macro tiling parameters depend on how many bits per pixel of the specific surface has and how the chip is configured. There is only one set of valid macrotile params for a given surface. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Tested-by: Link Mauve <linkmauve@linkmauve.fr> Tested-by: Nikola Medić <nmedic89@gmail.com> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Reviewed-by: Marek Olšák <maraeo@gmail.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Prune per-tile Timing from Apple Studio Display Primary TileFangzhi Zuo
[why] The Apple Studio Display primary tile advertises both the full 5120x2880 mode and the per-tile 2560x2880 timing. With the secondary tile already hidden from userspace, the stray 2560x2880 mode on the primary connector can still be picked by compositors, defeating the single 5K stream goal. [how] Prune the per-tile timing from the primary connector during get_modes: when the sink carries the disable_second_tile quirk and the connector is the primary tile (tile_h_loc == 0 && tile_v_loc == 0), drop any probed mode matching the advertised tile size (tile_h_size x tile_v_size) so userspace only sees the full 5120x2880 mode. Fixes: 49521be4809d ("drm/amd/display: hide Apple Studio Display secondary tile") Reviewed-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Add deeper event_property_update testsBhawanpreet Lakha
Expand KUnit coverage for event_property_update() beyond the null connector skip. Add cases for the disconnected, missing-state and missing-device skip branches, plus the fully connected path where hdcp_get_content_protection_from_status() maps HDCP_OFF to DESIRED and HDCP1 TYPE0 encryption to ENABLED. The connected-path tests use dm_kunit_alloc_adev() so the drm_device has an initialised mode_config connection_mutex, and pre-set the connector state to the expected content protection value so drm_hdcp_update_content_protection() takes its no-change early return. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Add initialized-branch test for psp_set_srmBhawanpreet Lakha
Cover the initialized path of psp_set_srm() using the SR-IOV VF bypass so psp_hdcp_invoke() is a no-op. The test asserts the SET_SRM command is staged (cmd_id, srm_buf_size and the copied SRM bytes) and that response validation fails on the zeroed reply, returning -EINVAL without updating srm_version. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Add KUnit tests for HDCP DDC link adaptersBhawanpreet Lakha
Expose the mod_hdcp DDC adapter callbacks for KUnit and add tests: lp_write_i2c / lp_read_i2c / lp_write_dpcd / lp_read_dpcd use recording fake i2c and DP aux backends to assert the built payloads (write flag, address, length, buffer, and the read offset-then-data sequence), plus failure when the connector is missing. lp_atomic_write_poll_read_i2c / lp_atomic_write_poll_read_aux cover the hardware-free early returns (NULL link and a payload too large to convert); the success path submits fused-IO to the DMCUB and is out of reach for a unit test. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Add KUnit tests for srm_data_write and srm_data_readBhawanpreet Lakha
Expose srm_data_write() and srm_data_read() for KUnit and add tests covering the sysfs SRM write/read paths: - write stages the buffer into srm_temp and returns count; with the TA uninitialized psp_set_srm() fails so the committed SRM is unchanged - read returns -EINVAL when psp_get_srm() returns NULL (TA uninitialized) - read returns 0 for an empty SRM using the SR-IOV VF bypass so psp_hdcp_invoke() is a no-op and psp_get_srm() returns a non-NULL buffer Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Add KUnit tests for hdcp_create_workqueueBhawanpreet Lakha
Cover the success path of hdcp_create_workqueue(): the workqueue and SRM buffers are allocated, max_link is recorded, the cp_psp callbacks and handle are published and every link's psp handle points at the device psp. Also cover the dtm_v3_supported branch (set for DCN 3.1, clear otherwise) and the init loop running for more than one link, alongside the existing zero-link early-return case. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Add KUnit tests for update_configBhawanpreet Lakha
Expose update_config() for KUnit and cover the NULL connector and NULL dc_link early returns, the dpms_off removal path and the active path that builds the display/link state and registers the connector. The active path leaves the DTM TA uninitialized so add_display_to_topology() returns early without touching firmware. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Add KUnit tests for enable_assrBhawanpreet Lakha
Expose enable_assr() for KUnit and cover the "DTM TA not initialized" path and the full command-build path, using the SR-IOV VF early-return to bypass psp_dtm_invoke()'s firmware submit. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.25.1) at 2026-09-07 16:14:07 +0000