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2026-03-27Merge branch 'icc-msm8974' into icc-nextGeorgi Djakov
Commit d6edc31f3a68 ("clk: qcom: smd-rpm: Separate out interconnect bus clocks") moved control over several RPM resources from the clk-smd-rpm driver to the icc-rpm.c interconnect helpers. Most of the platforms were fixed before that commit or shortly after. However the MSM8974 was left as a foster child in broken state. Fix the loose ends and reenable interconnects on that platform. * icc-msm8974 dt-bindings: interconnect: qcom,msm8974: drop bus clocks dt-bindings: interconnect: qcom,msm8974: use qcom,rpm-common interconnect: qcom: drop unused is_on flag interconnect: qcom: icc-rpm: allow overwriting get_bw callback interconnect: qcom: define OCMEM bus resource interconnect: qcom: let platforms declare their bugginess interconnect: qcom: msm8974: switch to the main icc-rpm driver interconnect: qcom: msm8974: expand DEFINE_QNODE macros Link: https://msgid.link/20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com Tested-by: Alexandre Messier <alex@me.ssier.org> Tested-by: Luca Weiss <luca.weiss@fairphone.com> # fairphone-fp2 Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-26dt-bindings: interconnect: qcom,msm8974: use qcom,rpm-commonDmitry Baryshkov
Use qcom,rpm-common schema to declare interconnects property instead describing it again. In future this will allow the platform to switch to the two-cell interconnects, adding the tag to the specification. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://msgid.link/20260324-msm8974-icc-v2-2-527280043ad8@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-26dt-bindings: interconnect: qcom,msm8974: drop bus clocksDmitry Baryshkov
Remove the wrong internal RPM bus clock representation that we've been carrying for years. They are an internal part of the interconnect fabric. They are not exported by any device and are not supposed to be used. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://msgid.link/20260324-msm8974-icc-v2-1-527280043ad8@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-17Merge branch 'icc-qcs615' into icc-nextGeorgi Djakov
This series enables QoS configuration for QNOC type device which can be found on QCS615 platform. It enables QoS configuration for master ports with predefined priority and urgency forwarding. This helps in prioritizing the traffic originating from different interconnect masters at NOC (Network On Chip). The system may function normally without this feature. However, enabling QoS helps optimize latency and bandwidth across subsystems like CPU, GPU, and multimedia engines, which becomes important in high-throughput scenarios. This is a feature aimed at performance enhancement to improve system performance under concurrent workloads. * icc-qcs615 dt-bindings: interconnect: qcom,qcs615-rpmh: add clocks property to enable QoS interconnect: qcom: qcs615: enable QoS configuration Link: https://msgid.link/20260311103548.1823044-1-odelu.kukatla@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-17dt-bindings: interconnect: qcom,qcs615-rpmh: add clocks property to enable QoSOdelu Kukatla
Aggre1-noc interconnect node on QCS615 has QoS registers located inside a block whose interface is clock-gated. Accessing these registers requires the corresponding clock(s) to be enabled. Update the bindings to include the 'clocks' property. Ensure that only aggre1-noc interconnect node uses this property by explicitly forbidding it for all other interconnect nodes. Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://msgid.link/20260311103548.1823044-2-odelu.kukatla@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06Merge branch 'icc-qcs8300' into icc-nextGeorgi Djakov
This series enables QoS configuration for QNOC type device which can be found on QCS8300 platform. It enables QoS configuration for master ports with predefined priority and urgency forwarding. This helps in prioritizing the traffic originating from different interconnect masters at NOC (Network On Chip). The system may function normally without this feature. However, enabling QoS helps optimize latency and bandwidth across subsystems like CPU, GPU, and multimedia engines, which becomes important in high-throughput scenarios. This is a feature aimed at performance enhancement to improve system performance under concurrent workloads. * icc-qcs8300 dt-bindings: interconnect: qcom,qcs8300-rpmh: add clocks property to enable QoS interconnect: qcom: qcs8300: enable QoS configuration Link: https://msgid.link/20260127090116.1438780-1-odelu.kukatla@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06Merge branch 'icc-mahua' into icc-nextGeorgi Djakov
Mahua is a derivative of the Glymur SoC and shares a significant portion of its interconnect topology with Glymur. As such, this series extends the existing Glymur interconnect driver to support Mahua, reusing common definitions where possible and adding SoC-specific configurations where necessary. * icc-mahua dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Mahua SoC interconnect: qcom: glymur: Add Mahua SoC support Link: https://msgid.link/20260209-mahua_icc-v3-0-c65f3dfd72c8@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06Merge branch 'icc-eliza' into icc-nextGeorgi Djakov
Add interconnect support for the Qualcomm Eliza SoC. * icc-eliza dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Eliza SoC interconnect: qcom: Add Eliza interconnect provider driver dt-bindings: interconnect: OSM L3: Add Eliza EPSS L3 compatible Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in ↵Odelu Kukatla
Eliza SoC Document the RPMh Network-On-Chip Interconnect of the Eliza platform. Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://msgid.link/20260224-eliza-interconnect-v4-1-ad75855d5018@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06dt-bindings: interconnect: OSM L3: Add Eliza EPSS L3 compatibleAbel Vesa
Eliza, similarly to SM8650, uses EPSS hardware for L3 scaling. Document it. Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://msgid.link/20260302-eliza-bindings-interconnect-epss-l3-v2-1-05b1848b98cc@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06dt-bindings: interconnect: qcom,glymur-rpmh: De-acronymize SoC nameKrzysztof Kozlowski
Glymur is a codename of Qualcomm SoC, not an acronym. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://msgid.link/20260217130035.281752-3-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06dt-bindings: interconnect: OSM L3: Document sm8550 OSM L3 compatibleAaron Kling
Document the OSM L3 found in the Qualcomm SM8550 platform. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Aaron Kling <webgeek1234@gmail.com> Link: https://msgid.link/20260219-sm8550-ddr-bw-scaling-v3-1-75c19152e921@gmail.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06dt-bindings: interconnect: qcom,qcs8300-rpmh: add clocks property to enable QoSOdelu Kukatla
Some QCS8300 interconnect nodes have QoS registers located inside a block whose interface is clock-gated. For those nodes, driver must enable the corresponding clock(s) before accessing the registers. Add the 'clocks' property so the driver can obtain and enable the required clock(s). Only interconnects that have clock‑gated QoS register interface use this property; it is not applicable to all interconnect nodes. Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://msgid.link/20260127090116.1438780-2-odelu.kukatla@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in ↵Raviteja Laggyshetty
Mahua SoC Document the RPMh Network-on-Chip (NoC) interconnect for the Qualcomm Mahua platform. Mahua is a derivative of the Glymur SoC. Many interconnect nodes are identical and continue to use Glymur fallback compatibles. Mahua introduces SoC-specific configurations and topologies for several NoC blocks, including CNOC, HSCNOC, PCIe West ANoC/Slave NoCs. This updates the existing Glymur yaml schema to include Mahua-specific compatible strings, using two-cell "fallback" compatibles wherever the hardware is identical with Glymur. Co-developed-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://msgid.link/20260209-mahua_icc-v3-1-c65f3dfd72c8@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-01-30Merge tag 'icc-6.20-rc1' of ↵Greg Kroah-Hartman
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next Georgi writes: interconnect changes for 6.20 This pull request contains the interconnect changes for the 6.20-rc1 merge window. The core and driver changes are listed below. Core changes: - Add KUnit tests for core functionality Driver changes: - New driver for MediaTek MT8196 EMI - MediaTek driver fixes - Support for Glymur BWMONs - QCS8300 driver topology fix - Misc cleanups Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-6.20-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc: interconnect: qcom: msm8974: drop duplicated RPM_BUS_{MASTER,SLAVE}_REQ defines interconnect: qcom: smd-rpm: drop duplicated QCOM_RPM_SMD_KEY_RATE define dt-bindings: interconnect: qcom-bwmon: Document Glymur BWMONs interconnect: qcom: qcs8300: fix the num_links for nsp icc node interconnect: Add kunit tests for core functionality dt-bindings: interconnect: qcom,qcs615-rpmh: Drop IPA interconnects interconnect: mediatek: Aggregate bandwidth with saturating add interconnect: mediatek: Don't hijack parent device interconnect: mediatek: Add support for MediaTek MT8196 EMI ICC dt-bindings: interconnect: mt8183-emi: Add support for MT8196 EMI
2026-01-21dt-bindings: interconnect: qcom-bwmon: Document Glymur BWMONsPragnesh Papaniya
Document Glymur BWMONs, which has multiple (one per cluster) BWMONv4 instances for the CPU->DDR path. Signed-off-by: Pragnesh Papaniya <pragnesh.papaniya@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260120-glymur_bwmon_binding-v1-1-57848445eccf@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-01-13Merge branch 'icc-mtk' into icc-nextGeorgi Djakov
This series is a combination of binding changes, driver cleanups and new driver code to enable the interconnect on the MediaTek MT8196 SoC. * icc-mtk dt-bindings: interconnect: mt8183-emi: Add support for MT8196 EMI interconnect: mediatek: Add support for MediaTek MT8196 EMI ICC interconnect: mediatek: Don't hijack parent device interconnect: mediatek: Aggregate bandwidth with saturating add Link: https://lore.kernel.org/r/20251124-mt8196-dvfsrc-v2-0-d9c1334db9f3@collabora.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-01-13dt-bindings: interconnect: qcom,qcs615-rpmh: Drop IPA interconnectsKonrad Dybcio
This has been agreed to be characterized as a clock resource, not an interconnect provider. Bring QCS615 in line with the expectation. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250627-topic-qcs615_icc_ipa-v1-3-dc47596cde69@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-12-21dt-bindings: interconnect: mt8183-emi: Add support for MT8196 EMIAngeloGioacchino Del Regno
Add a new compatible for the External Memory Interface Interconnect found on the MediaTek MT8196 Chromebook SoC. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://lore.kernel.org/r/20251124-mt8196-dvfsrc-v2-3-d9c1334db9f3@collabora.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-12-19dt-bindings: interconnect: qcom,sa8775p-rpmh: Fix incorrectly added reg and ↵Krzysztof Kozlowski
clocks Commit 8a55fbe4c94d ("dt-bindings: interconnect: add reg and clocks properties to enable QoS on sa8775p") claims that all interconnects have clocks and MMIO address space, but that is just not true. Only few have. Bindings should restrict properties and should not allow specifying non-existing hardware description, so fix missing constraints for 'reg' and 'clocks'. Fixes: 8a55fbe4c94d ("dt-bindings: interconnect: add reg and clocks properties to enable QoS on sa8775p") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20251129094612.16838-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-12-06Merge tag 'char-misc-6.19-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc/IIO driver updates from Greg KH: "Here is the big set of char/misc/iio driver updates for 6.19-rc1. Lots of stuff in here including: - lots of IIO driver updates, cleanups, and additions - large interconnect driver changes as they get converted over to a dynamic system of ids - coresight driver updates - mwave driver updates - binder driver updates and changes - comedi driver fixes now that the fuzzers are being set loose on them - nvmem driver updates - new uio driver addition - lots of other small char/misc driver updates, full details in the shortlog All of these have been in linux-next for a while now" * tag 'char-misc-6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (304 commits) char: applicom: fix NULL pointer dereference in ac_ioctl hangcheck-timer: fix coding style spacing hangcheck-timer: Replace %Ld with %lld hangcheck-timer: replace printk(KERN_CRIT) with pr_crit uio: Add SVA support for PCI devices via uio_pci_generic_sva.c dt-bindings: slimbus: fix warning from example intel_th: Fix error handling in intel_th_output_open misc: rp1: Fix an error handling path in rp1_probe() char: xillybus: add WQ_UNBOUND to alloc_workqueue users misc: bh1770glc: use pm_runtime_resume_and_get() in power_state_store misc: cb710: Fix a NULL vs IS_ERR() check in probe() mux: mmio: Add suspend and resume support virt: acrn: split acrn_mmio_dev_res out of acrn_mmiodev greybus: gb-beagleplay: Fix timeout handling in bootloader functions greybus: add WQ_PERCPU to alloc_workqueue users char/mwave: drop typedefs char/mwave: drop printk wrapper char/mwave: remove printk tracing char/mwave: remove unneeded fops char/mwave: remove MWAVE_FUTZ_WITH_OTHER_DEVICES ifdeffery ...
2025-11-19dt-bindings: interconnect: qcom,sm6350-rpmh: Add clocks for QoSLuca Weiss
Add the clocks for some interconnects to the bindings that are required to set up the QoS correctly. Update one of the examples to aggre2_noc to have an example with clocks. Also while we're at it, remove #interconnect-cells: true as that's already provided from qcom,rpmh-common.yaml. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20251114-sm6350-icc-qos-v2-1-6af348cb9c69@fairphone.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-11-19Merge branch 'icc-kaanapali' into icc-nextGeorgi Djakov
Add interconnect dt-bindings and driver support for Qualcomm Kaanapali SoC. * icc-kaanapali dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Kaanapali SoC interconnect: qcom: add Kaanapali interconnect provider driver dt-bindings: interconnect: qcom-bwmon: Document Kaanapali BWMONs Link: https://lore.kernel.org/r/20251031-knp-interconnect-v4-0-568bba2cb3e5@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-11-19dt-bindings: interconnect: qcom-bwmon: Document Kaanapali BWMONsAmir Vajid
Document the Kaanapali BWMONs, which have one instance per cluster of BWMONv4. Signed-off-by: Amir Vajid <amir.vajid@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250924-knp-bwmon-v1-1-56a9cdda7d72@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-11-17dt-bindings: Remove extra blank linesRob Herring (Arm)
Generally at most 1 blank line is the standard style for DT schema files. Remove the few cases with more than 1 so that the yamllint check for this can be enabled. Acked-by: Lee Jones <lee@kernel.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> # remoteproc Acked-by: Georgi Djakov <djakov@kernel.org> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Andi Shyti <andi.shyti@kernel.org> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Jonathan Cameron <jonathan.cameron@huawei.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Uwe Kleine-König <ukleinek@kernel.org> # for allwinner,sun4i-a10-pwm.yaml Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> # mtd Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Manivannan Sadhasivam <mani@kernel.org> # For PCI controller bindings Link: https://patch.msgid.link/20251023143957.2899600-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-11-17dt-bindings: Update Krzysztof Kozlowski's emailKrzysztof Kozlowski
Update Krzysztof Kozlowski's email address to kernel.org account to stay reachable. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251021095354.86455-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-10-31dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in ↵Raviteja Laggyshetty
Kaanapali SoC Document the RPMh Network-On-Chip Interconnect of the Kaanapali platform. Co-developed-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20251031-knp-interconnect-v4-1-568bba2cb3e5@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-10-31dt-bindings: interconnect: add reg and clocks properties to enable QoS on ↵Odelu Kukatla
sa8775p Add 'reg' and 'clocks' properties to enable QoS configuration. These properties enable access to QoS registers and necessary clocks for configuration. QoS configuration is essential for ensuring that latency sensitive components such as CPUs and multimedia engines receive prioritized access to memory and interconnect resources. This helps to manage bandwidth and latency across subsystems, improving system responsiveness and performance in concurrent workloads. Both 'reg' and 'clocks' properties are optional. If either is missing, QoS configuration will be skipped. This behavior is controlled by the 'qos_requires_clocks' flag in the driver, which ensures that QoS configuration is bypassed when required clocks are not defined. Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20251001073344.6599-2-odelu.kukatla@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-09-12Merge branch 'icc-glymur' into icc-nextGeorgi Djakov
Add interconnect dt-bindings and driver support for Qualcomm's next gen compute SoC - Glymur. * icc-glymur dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Glymur SoC interconnect: qcom: icc-rpmh: increase MAX_PORTS to support four QoS ports interconnect: qcom: add glymur interconnect provider driver Link: https://lore.kernel.org/r/20250814-glymur-icc-v2-0-596cca6b6015@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-09-12dt-bindings: interconnect: Add OSM L3 compatible for QCS615 SoCRaviteja Laggyshetty
Add Operation State Manager (OSM) L3 interconnect provider binding for QCS615 SoC. As the OSM hardware in QCS615 and SM8150 are same, added a family-level compatible for SM8150 SoC. Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250819-talos-l3-icc-v3-1-04529e85dac7@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-08-15dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in ↵Raviteja Laggyshetty
Glymur SoC Document the RPMh Network-On-Chip Interconnect in Glymur platform. Co-developed-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250814-glymur-icc-v2-1-596cca6b6015@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-07-29Merge tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull SoC devicetree updates from Arnd Bergmann: "There are a few new variants of existing chips: - mt6572 is an older mobile phone chip from mediatek that was extremely popular a decade ago but never got upstreamed until now - exynos2200 is a recent high-end mobile phone chip used in a few Samsung phones like the Galaxy S22 - Renesas R-Car V4M-7 (R8A779H2) is an updated version of R-Car V4M (R8A779H0) and used in automotive applications - Tegra264 is a new chip from NVIDIA, but support is fairly minimal for now, and not much information is public about it There are five more chips in a separate branch, as those are new chip families that I merged along with the necessary infrastructure. New board support is not that exciting, with a total of 33 newly added machines here: - Evaluation platforms for the chips above, plus TI am62d2 and Sophgo sg2042 - Six 32-bit industrial boards based on stm32, imx6 and am33 chips, plus eight 64-bit rockchips rk33xx/rk35xx, am62d2, t527, imx8 and imx95 - Two newly added ASPEED BMC based motherboards, and one that got removed - Phones and Tablets based on 32-bit mt6572, tegra30 and 64-bit msm8976 SoCs - Three Laptops based on Mediatek mt8186 and Qualcomm Snapdragon X1 - A set-top box based on Amlogic meson-gxm Updates for existing machines are spread over all the above families. One notable change here is support for the RP1 I/O chip used in Raspberry Pi 5" * tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (606 commits) riscv: dts: sophgo: fix mdio node name for CV180X riscv: dts: sophgo: sophgo-srd3-10: reserve uart0 device riscv: dts: sophgo: add Sophgo SG2042_EVB_V2.0 board device tree riscv: dts: sophgo: add Sophgo SG2042_EVB_V1.X board device tree dt-bindings: riscv: add Sophgo SG2042_EVB_V1.X/V2.0 bindings riscv: dts: sophgo: add ethernet GMAC device for sg2042 riscv: dts: sophgo: Enable ethernet device for Huashan Pi riscv: dts: sophgo: Add mdio multiplexer device for cv18xx riscv: dts: sophgo: Add ethernet device for cv18xx riscv: dts: sophgo: sg2044: add pmu configuration riscv: dts: sophgo: sg2044: add ziccrse extension riscv: dts: sophgo: add zfh for sg2042 riscv: dts: sophgo: add ziccrse for sg2042 riscv: dts: sophgo: Add xtheadvector to the sg2042 devicetree riscv: dts: sophgo: sg2044: add PCIe device support for SG2044 riscv: dts: sophgo: sg2044: add MSI device support for SG2044 riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoC riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC dt-bindings: soc: sophgo: Move SoCs/boards from riscv into soc, add SG2000 riscv: dts: sophgo: sg2044: Add missing riscv,cbop-block-size property ...
2025-07-22Merge branch 'icc-milos' into icc-nextGeorgi Djakov
Add documentation and driver for the interconnect on the Milos SoC. * icc-milos dt-bindings: interconnect: document the RPMh Network-On-Chip Interconnect in Qualcomm Milos SoC interconnect: qcom: Add Milos interconnect provider driver Link: https://lore.kernel.org/r/20250709-sm7635-icc-v3-0-c446203c3b3a@fairphone.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-07-21dt-bindings: interconnect: document the RPMh Network-On-Chip Interconnect in ↵Luca Weiss
Qualcomm Milos SoC Document the RPMh Network-On-Chip Interconnect of the Milos (e.g. SM7635) SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250709-sm7635-icc-v3-1-c446203c3b3a@fairphone.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-07-18dt-bindings: interconnect: qcom,msm8998-bwmon: Allow 'nonposted-mmio'Konrad Dybcio
One of the BWMON instances on SM8750 requires that its MMIO space is mapped specifically with the nE memory attribute. Allow the nonposted-mmio property which instructs the OS to do so. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250716-8750_cpubwmon-v4-1-12212098e90f@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-07-18dt-bindings: interconnect: Add EPSS L3 compatible for QCS8300 SoCRaviteja Laggyshetty
Add Epoch Subsystem (EPSS) L3 interconnect provider binding for QCS8300 SoC. As the EPSS hardware in QCS8300 and SA8775P are same, added a family-level compatible for SA877P SoC. This shared fallback compatible allows grouping of SoCs with similar hardware, reducing the need to explicitly list each variant in the driver match table. Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250711102540.143-2-raviteja.laggyshetty@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-07-18dt-bindings: interconnect: qcom: Remove double colon from descriptionLuca Weiss
No double colon is necessary in the description. Fix it for all bindings so future bindings won't have the same copy-paste mistake. Reported-by: Rob Herring <robh@kernel.org> Closes: https://lore.kernel.org/lkml/20250625150458.GA1182597-robh@kernel.org/ Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250717-bindings-double-colon-v1-2-c04abc180fcd@fairphone.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-07-07dt-bindings: interconnect: add mt7988-cci compatibleFrank Wunderlich
Add compatible for Mediatek MT7988 SoC with mediatek,mt8183-cci fallback which is taken by driver. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Georgi Djakov <djakov@kernel.org> Link: https://lore.kernel.org/r/20250706132213.20412-8-linux@fw-web.de Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-19Merge branch 'icc-sa8775p' into icc-nextGeorgi Djakov
Add Epoch Subsystem (EPSS) L3 provider support on SA8775P SoCs. Current interconnect framework is based on static IDs for creating node and registering with framework. This becomes a limitation for topologies where there are multiple instances of same interconnect provider. Modified interconnect framework APIs to create and link icc node with dynamic IDs, this will help to overcome the dependency on static IDs. * icc-sa8775p dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P interconnect: core: Add dynamic id allocation support interconnect: qcom: Add multidev EPSS L3 support interconnect: qcom: icc-rpmh: Add dynamic icc node id support interconnect: qcom: sa8775p: Add dynamic icc node id support Link: https://lore.kernel.org/r/20250415095343.32125-1-quic_rlaggysh@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-04-28dt-bindings: interconnect: Correct indentation and style in DTS exampleKrzysztof Kozlowski
DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. While re-indenting, drop unused labels. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250324125302.82167-1-krzysztof.kozlowski@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-04-15dt-bindings: interconnect: Add EPSS L3 compatible for SA8775PRaviteja Laggyshetty
Add Epoch Subsystem (EPSS) L3 interconnect provider binding on SA8775P SoCs. The L3 instance on the SA8775P SoC is similar to those on SoCs like SM8250 and SC7280. These SoCs use the PERF register instead of L3_REG for programming the performance level, which is managed in the data associated with the target-specific compatibles. Since the hardware remains the same across all EPSS-supporting SoCs, the generic compatible is retained for all SoCs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> Link: https://lore.kernel.org/r/20250415095343.32125-2-quic_rlaggysh@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-01-14Merge branch 'icc-sm8750' into icc-nextGeorgi Djakov
Add interconnect support for SM8750 SoC. The Qualcomm Technologies, Inc. SM8750 SoC is the latest in the line of consumer mobile device SoCs. * icc-sm8750 dt-bindings: interconnect: add interconnect bindings for SM8750 interconnect: qcom: Add interconnect provider driver for SM8750 interconnect: sm8750: Add missing const to static qcom_icc_desc Link: https://lore.kernel.org/r/20241204-sm8750_master_interconnects-v3-0-3d9aad4200e9@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-01-14dt-bindings: interconnect: qcom,msm8998-bwmon: Add SM8750 CPU BWMONsShivnandan Kumar
Document the SM8750 BWMONs, which has one instance per cluster of BWMONv4. Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Link: https://lore.kernel.org/r/20250113-sm8750_bwmon_master-v1-1-f082da3a3308@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-01-13dt-bindings: interconnect: OSM L3: Document sm8650 OSM L3 compatibleNeil Armstrong
Document the OSM L3 found in the Qualcomm SM8650 platform. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250110-topic-sm8650-ddr-bw-scaling-v1-1-041d836b084c@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-01-13dt-bindings: interconnect: qcom-bwmon: Document QCS615 bwmon compatiblesLijuan Gao
Document QCS615 BWMONs, which includes one BWMONv4 instance for CPU to LLCC path bandwidth monitoring and one BWMONv5 instance for LLCC to DDR path bandwidth monitoring. Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241218-add_bwmon_support_for_qcs615-v1-1-680d798a19e5@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2024-12-17dt-bindings: interconnect: add interconnect bindings for SM8750Raviteja Laggyshetty
Add interconnect device bindings. These devices can be used to describe any RPMh and NoC based interconnect devices. Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241204-sm8750_master_interconnects-v3-1-3d9aad4200e9@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2024-11-05Merge branch 'icc-sar2130p' into icc-nextGeorgi Djakov
Add driver for the network of connects present on the SAR2130P platform. * icc-sar2130p dt-bindings: interconnect: qcom: document SAR2130P NoC interconnect: qcom: add support for SAR2130P Link: https://lore.kernel.org/r/20241018-sar2130p-icc-v2-0-c58c73dcd19d@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2024-11-05Merge branch 'icc-qcs615' into icc-nextGeorgi Djakov
Add interconnect dt-bindings and driver support for Qualcomm QCS615 SoC. * icc-qcs615 dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in QCS615 SoC interconnect: qcom: add QCS615 interconnect provider driver Link: https://lore.kernel.org/r/20240924143958.25-1-quic_rlaggysh@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2024-11-05Merge branch 'icc-qcs8300' into icc-nextGeorgi Djakov
Add interconnect support for QCS8300 SoC * icc-qcs8300 dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in QCS8300 SoC interconnect: qcom: add QCS8300 interconnect provider driver Link: https://lore.kernel.org/r/20240910101013.3020-1-quic_rlaggysh@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2024-10-22dt-bindings: interconnect: qcom-bwmon: Document QCS8300 bwmon compatiblesJingyi Wang
Document QCS8300 BWMONs, which has two BWMONv4 instances for the CPU->LLCC path and one BWMONv5 instance for LLCC->DDR path. Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20240925-qcs8300_bwmon_binding-v1-1-a7bfd94b2854@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
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