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-rw-r--r--samples/Kconfig2
-rw-r--r--samples/landlock/sandboxer.c15
-rw-r--r--samples/qmi/qmi_sample_client.c2
-rw-r--r--samples/rust/rust_dma.rs13
-rw-r--r--samples/rust/rust_driver_pci.rs90
-rw-r--r--samples/tsm-mr/tsm_mr_sample.c68
-rw-r--r--samples/vfio-mdev/mtty.c33
7 files changed, 138 insertions, 85 deletions
diff --git a/samples/Kconfig b/samples/Kconfig
index 5bc7c9e5a59e..a75e8e78330d 100644
--- a/samples/Kconfig
+++ b/samples/Kconfig
@@ -186,6 +186,8 @@ config SAMPLE_TIMER
config SAMPLE_TSM_MR
tristate "TSM measurement sample"
+ select CRYPTO_LIB_SHA256
+ select CRYPTO_LIB_SHA512
select TSM_MEASUREMENTS
select VIRT_DRIVERS
help
diff --git a/samples/landlock/sandboxer.c b/samples/landlock/sandboxer.c
index e7af02f98208..66e56ae275c6 100644
--- a/samples/landlock/sandboxer.c
+++ b/samples/landlock/sandboxer.c
@@ -111,7 +111,8 @@ static int parse_path(char *env_path, const char ***const path_list)
LANDLOCK_ACCESS_FS_WRITE_FILE | \
LANDLOCK_ACCESS_FS_READ_FILE | \
LANDLOCK_ACCESS_FS_TRUNCATE | \
- LANDLOCK_ACCESS_FS_IOCTL_DEV)
+ LANDLOCK_ACCESS_FS_IOCTL_DEV | \
+ LANDLOCK_ACCESS_FS_RESOLVE_UNIX)
/* clang-format on */
@@ -295,11 +296,12 @@ out_unset:
LANDLOCK_ACCESS_FS_MAKE_SYM | \
LANDLOCK_ACCESS_FS_REFER | \
LANDLOCK_ACCESS_FS_TRUNCATE | \
- LANDLOCK_ACCESS_FS_IOCTL_DEV)
+ LANDLOCK_ACCESS_FS_IOCTL_DEV | \
+ LANDLOCK_ACCESS_FS_RESOLVE_UNIX)
/* clang-format on */
-#define LANDLOCK_ABI_LAST 7
+#define LANDLOCK_ABI_LAST 9
#define XSTR(s) #s
#define STR(s) XSTR(s)
@@ -436,7 +438,12 @@ int main(const int argc, char *const argv[], char *const *const envp)
/* Removes LANDLOCK_RESTRICT_SELF_LOG_NEW_EXEC_ON for ABI < 7 */
supported_restrict_flags &=
~LANDLOCK_RESTRICT_SELF_LOG_NEW_EXEC_ON;
-
+ __attribute__((fallthrough));
+ case 7:
+ case 8:
+ /* Removes LANDLOCK_ACCESS_FS_RESOLVE_UNIX for ABI < 9 */
+ ruleset_attr.handled_access_fs &=
+ ~LANDLOCK_ACCESS_FS_RESOLVE_UNIX;
/* Must be printed for any ABI < LANDLOCK_ABI_LAST. */
fprintf(stderr,
"Hint: You should update the running kernel "
diff --git a/samples/qmi/qmi_sample_client.c b/samples/qmi/qmi_sample_client.c
index d1814582319b..247ec5e54c4f 100644
--- a/samples/qmi/qmi_sample_client.c
+++ b/samples/qmi/qmi_sample_client.c
@@ -592,7 +592,7 @@ static int qmi_sample_init(void)
if (ret < 0)
goto err_unregister_driver;
- qmi_add_lookup(&lookup_client, 15, 0, 0);
+ qmi_add_lookup(&lookup_client, QMI_SERVICE_ID_TEST, 0, 0);
return 0;
diff --git a/samples/rust/rust_dma.rs b/samples/rust/rust_dma.rs
index ce39b5545097..129bb4b39c04 100644
--- a/samples/rust/rust_dma.rs
+++ b/samples/rust/rust_dma.rs
@@ -6,7 +6,12 @@
use kernel::{
device::Core,
- dma::{CoherentAllocation, DataDirection, Device, DmaMask},
+ dma::{
+ Coherent,
+ DataDirection,
+ Device,
+ DmaMask, //
+ },
page, pci,
prelude::*,
scatterlist::{Owned, SGTable},
@@ -16,7 +21,7 @@ use kernel::{
#[pin_data(PinnedDrop)]
struct DmaSampleDriver {
pdev: ARef<pci::Device>,
- ca: CoherentAllocation<MyStruct>,
+ ca: Coherent<[MyStruct]>,
#[pin]
sgt: SGTable<Owned<VVec<u8>>>,
}
@@ -64,8 +69,8 @@ impl pci::Driver for DmaSampleDriver {
// SAFETY: There are no concurrent calls to DMA allocation and mapping primitives.
unsafe { pdev.dma_set_mask_and_coherent(mask)? };
- let ca: CoherentAllocation<MyStruct> =
- CoherentAllocation::alloc_coherent(pdev.as_ref(), TEST_VALUES.len(), GFP_KERNEL)?;
+ let ca: Coherent<[MyStruct]> =
+ Coherent::zeroed_slice(pdev.as_ref(), TEST_VALUES.len(), GFP_KERNEL)?;
for (i, value) in TEST_VALUES.into_iter().enumerate() {
kernel::dma_write!(ca, [i]?, MyStruct::new(value.0, value.1));
diff --git a/samples/rust/rust_driver_pci.rs b/samples/rust/rust_driver_pci.rs
index d3d4a7931deb..47d3e84fab63 100644
--- a/samples/rust/rust_driver_pci.rs
+++ b/samples/rust/rust_driver_pci.rs
@@ -5,30 +5,63 @@
//! To make this driver probe, QEMU must be run with `-device pci-testdev`.
use kernel::{
- device::Bound,
- device::Core,
+ device::{
+ Bound,
+ Core, //
+ },
devres::Devres,
- io::Io,
+ io::{
+ register,
+ register::Array,
+ Io, //
+ },
+ num::Bounded,
pci,
prelude::*,
sync::aref::ARef, //
};
-struct Regs;
+mod regs {
+ use super::*;
-impl Regs {
- const TEST: usize = 0x0;
- const OFFSET: usize = 0x4;
- const DATA: usize = 0x8;
- const COUNT: usize = 0xC;
- const END: usize = 0x10;
+ register! {
+ pub(super) TEST(u8) @ 0x0 {
+ 7:0 index => TestIndex;
+ }
+
+ pub(super) OFFSET(u32) @ 0x4 {
+ 31:0 offset;
+ }
+
+ pub(super) DATA(u8) @ 0x8 {
+ 7:0 data;
+ }
+
+ pub(super) COUNT(u32) @ 0xC {
+ 31:0 count;
+ }
+ }
+
+ pub(super) const END: usize = 0x10;
}
-type Bar0 = pci::Bar<{ Regs::END }>;
+type Bar0 = pci::Bar<{ regs::END }>;
#[derive(Copy, Clone, Debug)]
struct TestIndex(u8);
+impl From<Bounded<u8, 8>> for TestIndex {
+ fn from(value: Bounded<u8, 8>) -> Self {
+ Self(value.into())
+ }
+}
+
+impl From<TestIndex> for Bounded<u8, 8> {
+ fn from(value: TestIndex) -> Self {
+ value.0.into()
+ }
+}
+
impl TestIndex {
const NO_EVENTFD: Self = Self(0);
}
@@ -54,40 +87,53 @@ kernel::pci_device_table!(
impl SampleDriver {
fn testdev(index: &TestIndex, bar: &Bar0) -> Result<u32> {
// Select the test.
- bar.write8(index.0, Regs::TEST);
+ bar.write_reg(regs::TEST::zeroed().with_index(*index));
- let offset = bar.read32(Regs::OFFSET) as usize;
- let data = bar.read8(Regs::DATA);
+ let offset = bar.read(regs::OFFSET).into_raw() as usize;
+ let data = bar.read(regs::DATA).into();
// Write `data` to `offset` to increase `count` by one.
//
// Note that we need `try_write8`, since `offset` can't be checked at compile-time.
bar.try_write8(data, offset)?;
- Ok(bar.read32(Regs::COUNT))
+ Ok(bar.read(regs::COUNT).into())
}
fn config_space(pdev: &pci::Device<Bound>) {
let config = pdev.config_space();
- // TODO: use the register!() macro for defining PCI configuration space registers once it
- // has been move out of nova-core.
+ // Some PCI configuration space registers.
+ register! {
+ VENDOR_ID(u16) @ 0x0 {
+ 15:0 vendor_id;
+ }
+
+ REVISION_ID(u8) @ 0x8 {
+ 7:0 revision_id;
+ }
+
+ BAR(u32)[6] @ 0x10 {
+ 31:0 value;
+ }
+ }
+
dev_info!(
pdev,
"pci-testdev config space read8 rev ID: {:x}\n",
- config.read8(0x8)
+ config.read(REVISION_ID).revision_id()
);
dev_info!(
pdev,
"pci-testdev config space read16 vendor ID: {:x}\n",
- config.read16(0)
+ config.read(VENDOR_ID).vendor_id()
);
dev_info!(
pdev,
"pci-testdev config space read32 BAR 0: {:x}\n",
- config.read32(0x10)
+ config.read(BAR::at(0)).value()
);
}
}
@@ -111,7 +157,7 @@ impl pci::Driver for SampleDriver {
pdev.set_master();
Ok(try_pin_init!(Self {
- bar <- pdev.iomap_region_sized::<{ Regs::END }>(0, c"rust_driver_pci"),
+ bar <- pdev.iomap_region_sized::<{ regs::END }>(0, c"rust_driver_pci"),
index: *info,
_: {
let bar = bar.access(pdev.as_ref())?;
@@ -131,7 +177,7 @@ impl pci::Driver for SampleDriver {
fn unbind(pdev: &pci::Device<Core>, this: Pin<&Self>) {
if let Ok(bar) = this.bar.access(pdev.as_ref()) {
// Reset pci-testdev by writing a new test index.
- bar.write8(this.index.0, Regs::TEST);
+ bar.write_reg(regs::TEST::zeroed().with_index(this.index));
}
}
}
diff --git a/samples/tsm-mr/tsm_mr_sample.c b/samples/tsm-mr/tsm_mr_sample.c
index a2c652148639..c79dbc1e0456 100644
--- a/samples/tsm-mr/tsm_mr_sample.c
+++ b/samples/tsm-mr/tsm_mr_sample.c
@@ -6,7 +6,7 @@
#include <linux/module.h>
#include <linux/tsm-mr.h>
#include <linux/miscdevice.h>
-#include <crypto/hash.h>
+#include <crypto/sha2.h>
static struct {
u8 static_mr[SHA384_DIGEST_SIZE];
@@ -23,47 +23,45 @@ static struct {
static int sample_report_refresh(const struct tsm_measurements *tm)
{
- struct crypto_shash *tfm;
- int rc;
-
- tfm = crypto_alloc_shash(hash_algo_name[HASH_ALGO_SHA512], 0, 0);
- if (IS_ERR(tfm)) {
- pr_err("crypto_alloc_shash failed: %ld\n", PTR_ERR(tfm));
- return PTR_ERR(tfm);
- }
-
- rc = crypto_shash_tfm_digest(tfm, (u8 *)&sample_report,
- offsetof(typeof(sample_report),
- report_digest),
- sample_report.report_digest);
- crypto_free_shash(tfm);
- if (rc)
- pr_err("crypto_shash_tfm_digest failed: %d\n", rc);
- return rc;
+ sha512((const u8 *)&sample_report,
+ offsetof(typeof(sample_report), report_digest),
+ sample_report.report_digest);
+ return 0;
}
static int sample_report_extend_mr(const struct tsm_measurements *tm,
const struct tsm_measurement_register *mr,
const u8 *data)
{
- SHASH_DESC_ON_STACK(desc, 0);
- int rc;
-
- desc->tfm = crypto_alloc_shash(hash_algo_name[mr->mr_hash], 0, 0);
- if (IS_ERR(desc->tfm)) {
- pr_err("crypto_alloc_shash failed: %ld\n", PTR_ERR(desc->tfm));
- return PTR_ERR(desc->tfm);
+ union {
+ struct sha256_ctx sha256;
+ struct sha384_ctx sha384;
+ struct sha512_ctx sha512;
+ } ctx;
+
+ switch (mr->mr_hash) {
+ case HASH_ALGO_SHA256:
+ sha256_init(&ctx.sha256);
+ sha256_update(&ctx.sha256, mr->mr_value, mr->mr_size);
+ sha256_update(&ctx.sha256, data, mr->mr_size);
+ sha256_final(&ctx.sha256, mr->mr_value);
+ return 0;
+ case HASH_ALGO_SHA384:
+ sha384_init(&ctx.sha384);
+ sha384_update(&ctx.sha384, mr->mr_value, mr->mr_size);
+ sha384_update(&ctx.sha384, data, mr->mr_size);
+ sha384_final(&ctx.sha384, mr->mr_value);
+ return 0;
+ case HASH_ALGO_SHA512:
+ sha512_init(&ctx.sha512);
+ sha512_update(&ctx.sha512, mr->mr_value, mr->mr_size);
+ sha512_update(&ctx.sha512, data, mr->mr_size);
+ sha512_final(&ctx.sha512, mr->mr_value);
+ return 0;
+ default:
+ pr_err("Unsupported hash algorithm: %d\n", mr->mr_hash);
+ return -EOPNOTSUPP;
}
-
- rc = crypto_shash_init(desc);
- if (!rc)
- rc = crypto_shash_update(desc, mr->mr_value, mr->mr_size);
- if (!rc)
- rc = crypto_shash_finup(desc, data, mr->mr_size, mr->mr_value);
- crypto_free_shash(desc->tfm);
- if (rc)
- pr_err("SHA calculation failed: %d\n", rc);
- return rc;
}
#define MR_(mr, hash) .mr_value = &sample_report.mr, TSM_MR_(mr, hash)
diff --git a/samples/vfio-mdev/mtty.c b/samples/vfio-mdev/mtty.c
index bd92c38379b8..69b6d9defbce 100644
--- a/samples/vfio-mdev/mtty.c
+++ b/samples/vfio-mdev/mtty.c
@@ -68,9 +68,12 @@
* Global Structures
*/
+static const struct class mtty_class = {
+ .name = MTTY_CLASS_NAME
+};
+
static struct mtty_dev {
dev_t vd_devt;
- struct class *vd_class;
struct cdev vd_cdev;
struct idr vd_idr;
struct device dev;
@@ -837,18 +840,11 @@ static long mtty_precopy_ioctl(struct file *filp, unsigned int cmd,
struct mdev_state *mdev_state = migf->mdev_state;
loff_t *pos = &filp->f_pos;
struct vfio_precopy_info info = {};
- unsigned long minsz;
int ret;
- if (cmd != VFIO_MIG_GET_PRECOPY_INFO)
- return -ENOTTY;
-
- minsz = offsetofend(struct vfio_precopy_info, dirty_bytes);
-
- if (copy_from_user(&info, (void __user *)arg, minsz))
- return -EFAULT;
- if (info.argsz < minsz)
- return -EINVAL;
+ ret = vfio_check_precopy_ioctl(&mdev_state->vdev, cmd, arg, &info);
+ if (ret)
+ return ret;
mutex_lock(&mdev_state->state_mutex);
if (mdev_state->state != VFIO_DEVICE_STATE_PRE_COPY &&
@@ -875,7 +871,8 @@ static long mtty_precopy_ioctl(struct file *filp, unsigned int cmd,
info.initial_bytes = migf->filled_size - *pos;
mutex_unlock(&migf->lock);
- ret = copy_to_user((void __user *)arg, &info, minsz) ? -EFAULT : 0;
+ ret = copy_to_user((void __user *)arg, &info,
+ offsetofend(struct vfio_precopy_info, dirty_bytes)) ? -EFAULT : 0;
unlock:
mtty_state_mutex_unlock(mdev_state);
return ret;
@@ -1980,15 +1977,14 @@ static int __init mtty_dev_init(void)
if (ret)
goto err_cdev;
- mtty_dev.vd_class = class_create(MTTY_CLASS_NAME);
+ ret = class_register(&mtty_class);
- if (IS_ERR(mtty_dev.vd_class)) {
+ if (ret) {
pr_err("Error: failed to register mtty_dev class\n");
- ret = PTR_ERR(mtty_dev.vd_class);
goto err_driver;
}
- mtty_dev.dev.class = mtty_dev.vd_class;
+ mtty_dev.dev.class = &mtty_class;
mtty_dev.dev.release = mtty_device_release;
dev_set_name(&mtty_dev.dev, "%s", MTTY_NAME);
@@ -2007,7 +2003,7 @@ err_device:
device_del(&mtty_dev.dev);
err_put:
put_device(&mtty_dev.dev);
- class_destroy(mtty_dev.vd_class);
+ class_unregister(&mtty_class);
err_driver:
mdev_unregister_driver(&mtty_driver);
err_cdev:
@@ -2026,8 +2022,7 @@ static void __exit mtty_dev_exit(void)
mdev_unregister_driver(&mtty_driver);
cdev_del(&mtty_dev.vd_cdev);
unregister_chrdev_region(mtty_dev.vd_devt, MINORMASK + 1);
- class_destroy(mtty_dev.vd_class);
- mtty_dev.vd_class = NULL;
+ class_unregister(&mtty_class);
pr_info("mtty_dev: Unloaded!\n");
}
generated by cgit v1.2.3 (git 2.25.1) at 2026-06-08 22:26:46 +0000