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-rw-r--r--drivers/gpu/drm/i915/display/intel_display_wa.c2
-rw-r--r--drivers/gpu/drm/i915/display/intel_display_wa.h1
-rw-r--r--drivers/gpu/drm/i915/display/intel_psr.c5
3 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index 7d3d63a59882..2094eda09c91 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -136,6 +136,8 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
return DISPLAY_VER(display) == 20 &&
IS_DISPLAY_VERx100_STEP(display, 3000,
STEP_A0, STEP_B0);
+ case INTEL_DISPLAY_WA_16029024088:
+ return DISPLAY_VER(display) >= 35;
case INTEL_DISPLAY_WA_18034343758:
return DISPLAY_VER(display) == 20 ||
(display->platform.pantherlake &&
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index 15fec843f15e..9cdd148ea4fa 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -52,6 +52,7 @@ enum intel_display_wa {
INTEL_DISPLAY_WA_16023588340,
INTEL_DISPLAY_WA_16025573575,
INTEL_DISPLAY_WA_16025596647,
+ INTEL_DISPLAY_WA_16029024088,
INTEL_DISPLAY_WA_18034343758,
INTEL_DISPLAY_WA_22010178259,
INTEL_DISPLAY_WA_22010947358,
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index bb1c0252837e..b0414bd1dc6b 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2913,6 +2913,11 @@ intel_psr_apply_su_area_workarounds(struct intel_crtc_state *crtc_state)
crtc_state->splitter.enable)
crtc_state->psr2_su_area.y1 = 0;
+ if (intel_display_wa(display, INTEL_DISPLAY_WA_16029024088) &&
+ crtc_state->req_psr2_sdp_prior_scanline &&
+ !crtc_state->enable_psr2_su_region_et)
+ crtc_state->psr2_su_area.y1 = 0;
+
/* Wa 14019834836 */
if (DISPLAY_VER(display) == 30)
intel_psr_apply_pr_link_on_su_wa(crtc_state);