diff options
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8550.dtsi | 367 |
1 files changed, 367 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 912525e9bca6..b7a7c49db077 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -17,6 +17,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interconnect/qcom,icc.h> #include <dt-bindings/interconnect/qcom,sm8550-rpmh.h> +#include <dt-bindings/interconnect/qcom,osm-l3.h> #include <dt-bindings/mailbox/qcom-ipcc.h> #include <dt-bindings/power/qcom-rpmpd.h> #include <dt-bindings/power/qcom,rpmhpd.h> @@ -78,6 +79,13 @@ qcom,freq-domain = <&cpufreq_hw 0>; capacity-dmips-mhz = <326>; dynamic-power-coefficient = <251>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&epss_l3 MASTER_EPSS_L3_APPS + &epss_l3 SLAVE_EPSS_L3_SHARED>; #cooling-cells = <2>; l2_0: l2-cache { compatible = "cache"; @@ -104,6 +112,13 @@ qcom,freq-domain = <&cpufreq_hw 0>; capacity-dmips-mhz = <326>; dynamic-power-coefficient = <251>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&epss_l3 MASTER_EPSS_L3_APPS + &epss_l3 SLAVE_EPSS_L3_SHARED>; #cooling-cells = <2>; l2_100: l2-cache { compatible = "cache"; @@ -125,6 +140,13 @@ qcom,freq-domain = <&cpufreq_hw 0>; capacity-dmips-mhz = <326>; dynamic-power-coefficient = <251>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&epss_l3 MASTER_EPSS_L3_APPS + &epss_l3 SLAVE_EPSS_L3_SHARED>; #cooling-cells = <2>; l2_200: l2-cache { compatible = "cache"; @@ -146,6 +168,13 @@ qcom,freq-domain = <&cpufreq_hw 1>; capacity-dmips-mhz = <693>; dynamic-power-coefficient = <447>; + operating-points-v2 = <&cpu3_opp_table>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&epss_l3 MASTER_EPSS_L3_APPS + &epss_l3 SLAVE_EPSS_L3_SHARED>; #cooling-cells = <2>; l2_300: l2-cache { compatible = "cache"; @@ -167,6 +196,13 @@ qcom,freq-domain = <&cpufreq_hw 1>; capacity-dmips-mhz = <693>; dynamic-power-coefficient = <447>; + operating-points-v2 = <&cpu3_opp_table>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&epss_l3 MASTER_EPSS_L3_APPS + &epss_l3 SLAVE_EPSS_L3_SHARED>; #cooling-cells = <2>; l2_400: l2-cache { compatible = "cache"; @@ -188,6 +224,13 @@ qcom,freq-domain = <&cpufreq_hw 1>; capacity-dmips-mhz = <693>; dynamic-power-coefficient = <447>; + operating-points-v2 = <&cpu3_opp_table>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&epss_l3 MASTER_EPSS_L3_APPS + &epss_l3 SLAVE_EPSS_L3_SHARED>; #cooling-cells = <2>; l2_500: l2-cache { compatible = "cache"; @@ -209,6 +252,13 @@ qcom,freq-domain = <&cpufreq_hw 1>; capacity-dmips-mhz = <693>; dynamic-power-coefficient = <447>; + operating-points-v2 = <&cpu3_opp_table>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&epss_l3 MASTER_EPSS_L3_APPS + &epss_l3 SLAVE_EPSS_L3_SHARED>; #cooling-cells = <2>; l2_600: l2-cache { compatible = "cache"; @@ -230,6 +280,13 @@ qcom,freq-domain = <&cpufreq_hw 2>; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <1057>; + operating-points-v2 = <&cpu7_opp_table>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&epss_l3 MASTER_EPSS_L3_APPS + &epss_l3 SLAVE_EPSS_L3_SHARED>; #cooling-cells = <2>; l2_700: l2-cache { compatible = "cache"; @@ -397,6 +454,306 @@ reg = <0 0xa0000000 0 0>; }; + cpu0_opp_table: opp-table-cpu0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-307200000 { + opp-hz = /bits/ 64 <307200000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>; + }; + + opp-441600000 { + opp-hz = /bits/ 64 <441600000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (384000 * 32)>; + }; + + opp-556800000 { + opp-hz = /bits/ 64 <556800000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>; + }; + + opp-672000000 { + opp-hz = /bits/ 64 <672000000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>; + }; + + opp-787200000 { + opp-hz = /bits/ 64 <787200000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (729600 * 32)>; + }; + + opp-902400000 { + opp-hz = /bits/ 64 <902400000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (844800 * 32)>; + }; + + opp-1017600000 { + opp-hz = /bits/ 64 <1017600000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (940800 * 32)>; + }; + + opp-1113600000 { + opp-hz = /bits/ 64 <1113600000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (1056000 * 32)>; + }; + + opp-1228800000 { + opp-hz = /bits/ 64 <1228800000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (1152000 * 32)>; + }; + + opp-1344000000 { + opp-hz = /bits/ 64 <1344000000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (1267200 * 32)>; + }; + + opp-1459200000 { + opp-hz = /bits/ 64 <1459200000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (1267200 * 32)>; + }; + + opp-1555200000 { + opp-hz = /bits/ 64 <1555200000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (1478400 * 32)>; + }; + + opp-1670400000 { + opp-hz = /bits/ 64 <1670400000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (1478400 * 32)>; + }; + + opp-1785600000 { + opp-hz = /bits/ 64 <1785600000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (1478400 * 32)>; + }; + + opp-1900800000 { + opp-hz = /bits/ 64 <1900800000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (1689600 * 32)>; + }; + + opp-2016000000 { + opp-hz = /bits/ 64 <2016000000>; + opp-peak-kBps = <(600000 * 16) (1555000 * 4) (1804800 * 32)>; + }; + }; + + cpu3_opp_table: opp-table-cpu3 { + compatible = "operating-points-v2"; + opp-shared; + + opp-499200000 { + opp-hz = /bits/ 64 <499200000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>; + }; + + opp-614400000 { + opp-hz = /bits/ 64 <614400000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>; + }; + + opp-729600000 { + opp-hz = /bits/ 64 <729600000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>; + }; + + opp-844800000 { + opp-hz = /bits/ 64 <844800000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>; + }; + + opp-940800000 { + opp-hz = /bits/ 64 <940800000>; + opp-peak-kBps = <(300000 * 16) (768000 * 4) (729600 * 32)>; + }; + + opp-1056000000 { + opp-hz = /bits/ 64 <1056000000>; + opp-peak-kBps = <(300000 * 16) (768000 * 4) (729600 * 32)>; + }; + + opp-1171200000 { + opp-hz = /bits/ 64 <1171200000>; + opp-peak-kBps = <(466000 * 16) (1555000 * 4) (940800 * 32)>; + }; + + opp-1286400000 { + opp-hz = /bits/ 64 <1286400000>; + opp-peak-kBps = <(466000 * 16) (1555000 * 4) (940800 * 32)>; + }; + + opp-1401600000 { + opp-hz = /bits/ 64 <1401600000>; + opp-peak-kBps = <(600000 * 16) (1708000 * 4) (1056000 * 32)>; + }; + + opp-1536000000 { + opp-hz = /bits/ 64 <1536000000>; + opp-peak-kBps = <(600000 * 16) (1708000 * 4) (1056000 * 32)>; + }; + + opp-1651200000 { + opp-hz = /bits/ 64 <1651200000>; + opp-peak-kBps = <(600000 * 16) (1708000 * 4) (1267200 * 32)>; + }; + + opp-1785600000 { + opp-hz = /bits/ 64 <1785600000>; + opp-peak-kBps = <(600000 * 16) (1708000 * 4) (1267200 * 32)>; + }; + + opp-1920000000 { + opp-hz = /bits/ 64 <1920000000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1267200 * 32)>; + }; + + opp-2054400000 { + opp-hz = /bits/ 64 <2054400000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>; + }; + + opp-2188800000 { + opp-hz = /bits/ 64 <2188800000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>; + }; + + opp-2323200000 { + opp-hz = /bits/ 64 <2323200000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>; + }; + + opp-2457600000 { + opp-hz = /bits/ 64 <2457600000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>; + }; + + opp-2592000000 { + opp-hz = /bits/ 64 <2592000000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>; + }; + + opp-2707200000 { + opp-hz = /bits/ 64 <2707200000>; + opp-peak-kBps = <(933000 * 16) (2736000 * 4) (1478400 * 32)>; + }; + + opp-2803200000 { + opp-hz = /bits/ 64 <2803200000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1689600 * 32)>; + }; + }; + + cpu7_opp_table: opp-table-cpu7 { + compatible = "operating-points-v2"; + opp-shared; + + opp-595200000 { + opp-hz = /bits/ 64 <595200000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>; + }; + + opp-729600000 { + opp-hz = /bits/ 64 <729600000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>; + }; + + opp-864000000 { + opp-hz = /bits/ 64 <864000000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>; + }; + + opp-998400000 { + opp-hz = /bits/ 64 <998400000>; + opp-peak-kBps = <(300000 * 16) (768000 * 4) (729600 * 32)>; + }; + + opp-1132800000 { + opp-hz = /bits/ 64 <1132800000>; + opp-peak-kBps = <(300000 * 16) (768000 * 4) (729600 * 32)>; + }; + + opp-1248000000 { + opp-hz = /bits/ 64 <1248000000>; + opp-peak-kBps = <(466000 * 16) (1555000 * 4) (940800 * 32)>; + }; + + opp-1363200000 { + opp-hz = /bits/ 64 <1363200000>; + opp-peak-kBps = <(466000 * 16) (1555000 * 4) (940800 * 32)>; + }; + + opp-1478400000 { + opp-hz = /bits/ 64 <1478400000>; + opp-peak-kBps = <(600000 * 16) (1708000 * 4) (1056000 * 32)>; + }; + + opp-1593600000 { + opp-hz = /bits/ 64 <1593600000>; + opp-peak-kBps = <(600000 * 16) (1708000 * 4) (1056000 * 32)>; + }; + + opp-1708800000 { + opp-hz = /bits/ 64 <1708800000>; + opp-peak-kBps = <(600000 * 16) (1708000 * 4) (1267200 * 32)>; + }; + + opp-1843200000 { + opp-hz = /bits/ 64 <1843200000>; + opp-peak-kBps = <(600000 * 16) (1708000 * 4) (1267200 * 32)>; + }; + + opp-1977600000 { + opp-hz = /bits/ 64 <1977600000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1267200 * 32)>; + }; + + opp-2092800000 { + opp-hz = /bits/ 64 <2092800000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>; + }; + + opp-2227200000 { + opp-hz = /bits/ 64 <2227200000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>; + }; + + opp-2342400000 { + opp-hz = /bits/ 64 <2342400000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>; + }; + + opp-2476800000 { + opp-hz = /bits/ 64 <2476800000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>; + }; + + opp-2592000000 { + opp-hz = /bits/ 64 <2592000000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>; + }; + + opp-2726400000 { + opp-hz = /bits/ 64 <2726400000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1478400 * 32)>; + }; + + opp-2841600000 { + opp-hz = /bits/ 64 <2841600000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1689600 * 32)>; + }; + + opp-2956800000 { + opp-hz = /bits/ 64 <2956800000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1689600 * 32)>; + }; + + opp-3187200000 { + opp-hz = /bits/ 64 <3187200000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1689600 * 32)>; + }; + }; + pmu-a510 { compatible = "arm,cortex-a510-pmu"; interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster0>; @@ -5482,6 +5839,16 @@ }; }; + epss_l3: interconnect@17d90000 { + compatible = "qcom,sm8550-epss-l3", "qcom,epss-l3"; + reg = <0 0x17d90000 0 0x1000>; + + clocks = <&bi_tcxo_div2>, <&gcc GCC_GPLL0>; + clock-names = "xo", "alternate"; + + #interconnect-cells = <1>; + }; + cpufreq_hw: cpufreq@17d91000 { compatible = "qcom,sm8550-cpufreq-epss", "qcom,cpufreq-epss"; reg = <0 0x17d91000 0 0x1000>, |