diff options
| author | Timur Kristóf <timur.kristof@gmail.com> | 2026-08-03 15:23:03 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-08-06 12:47:23 -0400 |
| commit | c9ddc90f91597ba06c9fcbbfd34f62d4b9b524d0 (patch) | |
| tree | 034f02d5ec55cd0f00809736b8b00ebbc1f45df2 /tools/perf/scripts/python | |
| parent | 60f20946cd318518ddc2c0da12103c666b2b9564 (diff) | |
drm/amdgpu/gfx6: Initialize compute rings before CP start
In GFX6 GPUs, compute takes the same CP path as graphics.
CP ME command parser executes packets for each ring buffer:
RB0 supports graphics, RB1 and RB2 are compute only.
Initialize all three rings before calling gfx_v6_0_cp_gfx_start()
to make sure they are all in a sane state before execution starts.
Previously, the two compute-only rings were initialized after
the ME had been already started, which could cause the ME to
start executing the ring contents before the rings could be
properly initialized. This happens to work when the HW is first
initialized, but not during an IP block reset where we want
to reinitialize the compute rings before starting the ME
to prevent it from executing garbage from these rings.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
