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authorVinod Govindapillai <vinod.govindapillai@intel.com>2026-01-30 11:59:19 +0200
committerVinod Govindapillai <vinod.govindapillai@intel.com>2026-02-02 11:25:51 +0200
commitc0dc68f4e2aa7eddb9ec6d95931f9576d8fe7334 (patch)
tree97f9500f716f733cdea841f3e59bbbdf1a5e1d00 /tools/perf/scripts/python
parent129a4da117075746bd1a0809f684fc1c7eabfd65 (diff)
drm/i915/display: fix the pixel normalization handling for xe3p_lpd
Pixel normalizer is enabled with normalization factor as 1.0 for FP16 formats in order to support FBC for those formats in xe3p_lpd. Previously pixel normalizer gets disabled during the plane disable routine. But there could be plane format settings without explicitly calling the plane disable in-between and we could endup keeping the pixel normalizer enabled for formats which we don't require that. This is causing crc mismatches in yuv formats and FIFO underruns in planar formats like NV12. Fix this by updating the pixel normalizer configuration based on the pixel formats explicitly during the plane settings arm calls itself - enable it for FP16 and disable it for other formats in HDR capable planes. v2: avoid redundant pixel normalization setting updates v3: moved the normalization factor definition to intel_fbc.c and some updates to comments v4: simplified the pixel normalizer setting handling Fixes: 5298eea7ed20 ("drm/i915/xe3p_lpd: use pixel normalizer for fp16 formats for FBC") Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patch.msgid.link/20260130095919.107805-1-vinod.govindapillai@intel.com
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