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authorBiju Das <biju.das.jz@bp.renesas.com>2026-03-25 19:24:25 +0000
committerThomas Gleixner <tglx@kernel.org>2026-03-26 16:56:22 +0100
commitbcb30669088a69cc8de2a5cf446b8b72f6b6e8eb (patch)
tree04f50b490783201af8da5bcdd6b43e83530e52e6 /tools/perf/scripts/python
parent0b2675fadf4fdfdb69c492b38cc0d6f6a3e2f937 (diff)
irqchip/renesas-rzg2l: Split rzfive_irqc_{mask,unmask} into separate IRQ and TINT handlers
rzfive_irqc_mask() and rzfive_irqc_unmask() use hw_irq range checks to dispatch between IRQ and TINT masking operations. Split each into two dedicated handlers — rzfive_irqc_irq_mask(), rzfive_irqc_tint_mask(), rzfive_irqc_irq_unmask(), and rzfive_irqc_tint_unmask() — each operating unconditionally on its respective interrupt type, removing the runtime conditionals. Assign the IRQ-specific handlers to rzfive_irqc_irq_chip and the TINT-specific handlers to rzfive_irqc_tint_chip, consistent with the separation applied to the EOI, set_type, and enable/disable callbacks in previous patches. While at it, simplify rzfive_irqc_{irq,tint}_{mask,unmask}() by replacing raw_spin_lock locking/unlocking with scoped_guard(). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Link: https://patch.msgid.link/20260325192451.172562-11-biju.das.jz@bp.renesas.com
Diffstat (limited to 'tools/perf/scripts/python')
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