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| author | Zide Chen <zide.chen@intel.com> | 2026-06-11 09:00:30 -0700 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2026-06-30 10:57:04 +0200 |
| commit | ae7ca8796ddac708db592c5a68555414c451afcc (patch) | |
| tree | 7ae65af7c627978728d28df0e135e1606ba858a6 /tools/perf/scripts/python | |
| parent | 3012af7df3430788eddd30b3c6654d0a0a5f06c6 (diff) | |
perf/x86/intel/uncore: Factor out box setup code
The PCI uncore PMU path already implements a lazy registration model:
the PMU is registered when the first active box appears and
unregistered when the last active box is removed.
Factor this registration management into a shared helper, so the same
code can be reused by the MSR and MMIO paths in later changes.
No functional change intended.
Signed-off-by: Zide Chen <zide.chen@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Ian Rogers <irogers@google.com>
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Link: https://patch.msgid.link/20260611160033.66760-6-zide.chen@intel.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
