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authorFabio Estevam <festevam@gmail.com>2026-07-21 10:34:45 -0300
committerHeiko Stuebner <heiko@sntech.de>2026-07-24 21:30:31 +0200
commita761818d9ee11183df0aefd16bf9fe46cc1c4c6d (patch)
treed25840903b4004b99997c95c1e7b535e9bd07b65 /tools/perf/scripts/python
parent896e4c4508b66f9b4c9ff12b536bd1a031621aa5 (diff)
arm64: dts: rockchip: Fix Gru WLAN sideband interrupt
The Marvell WLAN host wake interrupt is wired to GPIO0 8 and is not one of the PCI INTx interrupts. The PCI device schema therefore interprets the two-cell GPIO interrupt specifier as an invalid PCI interrupt and reports dtbs_check warnings: pcie@0,0: wifi@0,0:interrupts:0:0: 8 is not one of [1, 2, 3, 4] pcie@0,0: wifi@0,0:interrupts:0: [8, 8] is too long Describe the sideband interrupt with interrupts-extended, which explicitly carries the interrupt controller and removes the ambiguity. Fixes: 48f4d9796d99 ("arm64: dts: rockchip: add Gru/Kevin DTS") Signed-off-by: Fabio Estevam <festevam@gmail.com> Link: https://patch.msgid.link/20260721133445.44283-1-festevam@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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