diff options
| author | Mark Brown <broonie@kernel.org> | 2026-08-07 15:56:06 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-08-07 15:56:06 +0100 |
| commit | 9b57f08ab5c40d6c68653adf8bc80d7e6a3a9d3b (patch) | |
| tree | be3832090c645116aeb76bba00e67164c56e732f /tools/perf/scripts/python | |
| parent | 72255015947640dad08b4c5bfa51bebf2fab393b (diff) | |
| parent | f70bc276fc7f712ff5c8e995d5050558a3198df2 (diff) | |
ASoC: tegra: sort the reg_defaults tables
Peter Ujfalusi <peter.ujfalusi@linux.intel.com> says:
reg_defaults must be sorted by ascending register address, since
regcache_lookup_reg() locates entries in it with bsearch(). When a table is
not sorted, bsearch() cannot find the entries which follow a descending step,
so regcache_reg_needs_sync() falls back to reporting that a sync is needed for
them. Those registers are then written to the device on every regcache_sync()
even when they were never touched.
See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays")
for the same problem in a different context.
The series is based on broonie/for-linus (05eebef3c7b2).
Affected tables:
tegra210_i2s_reg_defaults 2 of 8 entries unreachable
tegra264_i2s_reg_defaults 4 of 9 entries unreachable
tegra210_mixer_reg_defaults 1 entry unreachable
Link: https://patch.msgid.link/20260805122748.13090-1-peter.ujfalusi@linux.intel.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
