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| author | Aksh Garg <a-garg7@ti.com> | 2026-02-24 14:08:17 +0530 |
|---|---|---|
| committer | Manivannan Sadhasivam <mani@kernel.org> | 2026-03-09 12:00:11 +0530 |
| commit | 94cbea0f636b55602a9a10583670976680ecea67 (patch) | |
| tree | 90c43f6e4e269dc38124ad76d3f1da3567cc857b /tools/perf/scripts/python | |
| parent | 271d0b1f058ae9815e75233d04b23e3558c3e4f4 (diff) | |
PCI: dwc: ep: Mirror the max link width and speed fields to all functions
PCIe r7.0, section 7.5.3.6 states that for multi-function devices, the
Max Link Width and Max Link Speed fields in the Link Capabilities
Register must report the same values for all functions.
Currently, dw_pcie_setup() programs these fields only for Function 0
via dw_pcie_link_set_max_speed() and dw_pcie_link_set_max_link_width().
For multi-function endpoint configurations, Function 1 and beyond retain
their default values, violating the PCIe specification.
Fix this by reading the Max Link Width and Max Link Speed fields from
Link Capabilities Register of Function 0 after dw_pcie_setup() completes,
then mirroring these values to all other functions.
Fixes: 24ede430fa49 ("PCI: designware-ep: Add multiple PFs support for DWC")
Fixes: 89db0793c9f2 ("PCI: dwc: Add missing PCI_EXP_LNKCAP_MLW handling")
Signed-off-by: Aksh Garg <a-garg7@ti.com>
[mani: renamed ref_lnkcap to func0_lnkcap]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Link: https://patch.msgid.link/20260224083817.916782-3-a-garg7@ti.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions