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authorNeeraj Soni <neeraj.soni@oss.qualcomm.com>2026-06-29 13:05:31 +0530
committerUlf Hansson <ulfh@kernel.org>2026-07-06 15:21:24 +0200
commit89dfb7cc1a9dc9e7f90e822cb402d3f848f1650a (patch)
tree882b876c478f3a3cafa12b37b7053c3bae932602 /tools/perf/scripts/python
parent8cdeaa50eae8dad34885515f62559ee83e7e8dda (diff)
dt-bindings: mmc: sdhci-msm: add ICE phandle
On newer Qualcomm SoCs (starting with sc7280/kodiak), ICE is modelled as a dedicated DT node. Add the optional qcom,ice phandle to reference that node from the SDHCI controller. When qcom,ice is present, disallow an embedded ICE register region in the SDHCI node to avoid double modelling. Older SoCs without qcom,ice remain valid. Co-developed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Co-developed-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com> Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Neeraj Soni <neeraj.soni@oss.qualcomm.com> Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com> Signed-off-by: Ulf Hansson <ulfh@kernel.org>
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