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authorClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>2026-07-13 16:05:41 +0300
committerAlexandre Belloni <alexandre.belloni@bootlin.com>2026-07-31 09:28:13 +0200
commit826a7d3d5ff2296d021a6a4521544b852609047a (patch)
tree7dab48e6756a9a4a75bfa82199c1586fa698a7af /tools/perf/scripts/python
parent5e0b4ae8017782c5495f96f924b28fa447682a36 (diff)
i3c: renesas: Update HW registers after SW computations are done
renesas_i3c_bus_init() performs a number of computations and software cache updates, interleaving them with hardware register writes. While this works today, it makes it harder to minimize the time the controller must remain powered when runtime PM is introduced. Perform all software computations and cache updates first, then update the hardware registers. This prepares for future runtime PM support. Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Tested-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://patch.msgid.link/20260713130545.568657-14-claudiu.beznea+renesas@tuxon.dev Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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