diff options
| author | Taniya Das <taniya.das@oss.qualcomm.com> | 2026-07-24 16:25:05 +0530 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-07-30 22:31:30 -0500 |
| commit | 6c3a4d971503b04b00d75a37882becb3c2f57f30 (patch) | |
| tree | 883608f8e550230297776660ae057a2581aed610 /tools/perf/scripts/python | |
| parent | 470bd66370ecbf22c2dc27249315b9d39914c479 (diff) | |
clk: qcom: gcc-nord: mark PCIe link clocks as critical
The PCIe link AHB and XO clocks must remain enabled for proper
operation. Representing them as clk_branch instances allows them
to be gated, which is undesirable.
Remove their clk_branch definitions and register their CBCRs as
critical clocks instead so they remain enabled.
This matches the handling of similar always-on clocks in other
Qualcomm clock drivers.
Fixes: a4f780cd5c7a ("clk: qcom: gcc: Add multiple global clock controller driver for Nord SoC")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260724-nords_mm_v1-v3-1-32b45232217f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
