summaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python
diff options
context:
space:
mode:
authorLorenzo Pieralisi <lpieralisi@kernel.org>2026-07-09 10:40:12 +0200
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2026-07-09 15:30:18 +0200
commit64ae310bffa477cd11029c818bec489f4b8a845e (patch)
treeba3f178ddeb35cc086e48a8518b6c174a1a8e6b9 /tools/perf/scripts/python
parentdeef78d3543976dc4a0d03658e0b55545d7564ad (diff)
ACPI: RISC-V: Fix riscv_acpi_irq_get_dep() loop termination
In riscv_acpi_add_irq_dep() the main loop condition would currently stop the loop if an interrupt descriptor contains an interrupt for which the respective GSI handle is NULL, which is not correct because subsequent interrupts in the interrupt descriptor might still have a GSI dependency that must not be skipped. Rework riscv_acpi_add_irq_dep() and the riscv_acpi_irq_get_dep() call chain to fix it - by not forcing the loop to stop in order to guarantee dependency detection for all the interrupt entries in the CRS descriptor. Fixes: 1b173cc4bfcd ("ACPI: RISC-V: Implement function to add implicit dependencies") Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Tested-by: Sunil V L <sunilvl@oss.qualcomm.com> Reviewed-by: Sunil V L <sunilvl@oss.qualcomm.com> Link: https://patch.msgid.link/20260709-gic-v5-acpi-iwb-probe-deferral-v4-2-48dae790f871@kernel.org Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions