diff options
| author | Ananthu C V <ananthu.cv@oss.qualcomm.com> | 2026-07-09 23:39:44 -0700 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-07-27 21:08:51 -0500 |
| commit | 61e5b39e96aadeafa884ab96c1477b781dccf145 (patch) | |
| tree | 67c8d341a4a73a2a9b233d919ef509fb14a44d7b /tools/perf/scripts/python | |
| parent | 2947778fbc2e4cdf9b2f67f11854ebfa25194769 (diff) | |
arm64: dts: qcom: glymur: fix SoCCP memory mappings
The currently listed SoCCP and SoCCP DTB reserved memory regions
don't align with the memory requested by the SoCCP Firmware. Fix
this by updating the SoCCP/SoCCP DTB memory regions to reflect the
memory region requirements of the SoCCP firmware, as described in
the Glymur v21 memory map release.
Fixes: 41b6e8db400c ("arm64: dts: qcom: Introduce Glymur base dtsi")
Signed-off-by: Ananthu C V <ananthu.cv@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260709-glymur-soccp-v6-3-16f70227547d@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions