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| author | Tomer Maimon <tmaimon77@gmail.com> | 2026-07-15 15:29:23 +0300 |
|---|---|---|
| committer | Linus Walleij <linusw@kernel.org> | 2026-07-24 23:33:01 +0200 |
| commit | 602ee6c9447e4382c7e145b26a1c940813f2a144 (patch) | |
| tree | 6ddac1ae9e94f0e39de8553049109b2ffc99d5e0 /tools/perf/scripts/python | |
| parent | e74ff540a7480a3ebe752b72858bbc1c15ede6dc (diff) | |
pinctrl: npcm8xx: fix debounce register selection
Each DBNCS register programs debounce source selection for 16 GPIOs.
The current offset calculation advances the register address every four
GPIOs, so offsets 4-15 and 20-31 end up touching the wrong selector
register.
Advance the DBNCS offset per 16 GPIOs so each line uses the debounce
selector bank that matches the hardware layout.
Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions