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| author | Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2026-02-02 16:07:28 +0530 |
|---|---|---|
| committer | Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2026-02-03 13:47:11 +0530 |
| commit | 5ec260d7bb47c8a63a6c8b31138a1a43f461d902 (patch) | |
| tree | aba984159fd670d484b5644545d154919e5ac28c /tools/perf/scripts/python | |
| parent | 0bdd29f5855b54fc4344a3036552f75554ae7573 (diff) | |
drm/i915/dp: Account for DSC slice overhead
Account for DSC slice overhead bubbles and adjust the pixel rate while
checking the pixel rate against the max dotclock limits.
v2: Add missing assignment for dsc_slice_count in
mst_connector_mode_valid_ctx(). (Imre)
v3: Explicitly pass dsc_slice_count as 0 for Non-DSC case. (Imre)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260202103731.357416-15-ankit.k.nautiyal@intel.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions