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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2025-04-11 19:05:29 +0200 |
|---|---|---|
| committer | Hans Verkuil <hverkuil@xs4all.nl> | 2025-04-23 10:55:53 +0200 |
| commit | 52e39050616aa7e72ea0f6330501368d5f6925e1 (patch) | |
| tree | 8769ad29259cbe05afdc002df0271033d170b5b5 /tools/perf/scripts/python | |
| parent | e7376745ad5c8548e31d9ea58adfb5a847e017a4 (diff) | |
media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/V2H(P) SoC
The MIPI CSI-2 block on the Renesas RZ/V2H(P) SoC is similar to the one
found on the Renesas RZ/G2L SoC, with the following differences:
- A different D-PHY
- Additional registers for the MIPI CSI-2 link
- Only two clocks
Add a new compatible string, `renesas,r9a09g057-csi2`, for the RZ/V2H(P)
SoC.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Link: https://lore.kernel.org/r/20250411170624.472257-2-tommaso.merciai.xr@bp.renesas.com
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions