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authorPavel Löbl <pavel@loebl.cz>2026-06-05 15:03:40 +0200
committerBrian Masney <bmasney@redhat.com>2026-06-29 13:17:28 -0400
commit4adf593c6fc5aed4639add011f71a074a1bd3966 (patch)
tree74d93a633db5f07f32ae21baf607d1b88a634f72 /tools/perf/scripts/python
parent91d00e377f65933d92a6d8aa9a4ab5a4bc5b84c4 (diff)
clk: clocking-wizard: fix integer overflow in rate calculation
When using driver on Zynq-7000 (32-bit) determine_rate calculation overflows. For instance requesting 32MHz with 100MHz parent clock results in 100000000*(4*1000+0) 32-bit multiplication. Replace the expression with mult_frac which is already used in clk_wzrd_recalc_ratef. Cc: stable@vger.kernel.org Fixes: 7681f64e6404 ("clk: clocking-wizard: calculate dividers fractional parts") Signed-off-by: Pale Löbl <pavel@loebl.cz> Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Brian Masney <bmasney@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions