diff options
| author | Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com> | 2026-06-16 21:51:39 +0530 |
|---|---|---|
| committer | Animesh Manna <animesh.manna@intel.com> | 2026-06-17 18:07:12 +0530 |
| commit | 4aa633b8e7061bb54c4125c9aa57e1e42fe4da76 (patch) | |
| tree | 58313732db711b50f75a97f9d4d6e548460661b2 /tools/perf/scripts/python | |
| parent | 481fe84b7361b3079ce279f7f93f39b9ee88fea9 (diff) | |
drm/i915/display: Remove TGL DC3CO support
Remove all Tiger Lake DC3CO-related functions from intel_psr.c and
intel_display_power_well.c, as the feature is not enabled and not used.
Also remove the TGL/DG1 DC3CO count debugfs entry from intel_dmc.c,
as DC3CO is not active on those platforms. A new debugfs entry for
Xe3LP will be added in a subsequent patch.
Remove the unused dc3co_exitline field from struct intel_psr and
struct intel_crtc_state, along with the corresponding EXITLINE register
read in intel_psr_get_config().
Changes in v2:
- Squash "Remove unused PSR dc3co_exitline field" and
"Remove unused dc3co_exitline from crtc_state" into this patch
Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patch.msgid.link/20260616162154.2630995-2-dibin.moolakadan.subrahmanian@intel.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
