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authorPeter Ujfalusi <peter.ujfalusi@linux.intel.com>2026-08-05 15:27:27 +0300
committerMark Brown <broonie@kernel.org>2026-08-07 15:53:40 +0100
commit437fbdeb60693b8f2e8250d44d29e513a95df298 (patch)
treea38c35126bee5947c65c687ae302b30a8ab665a3 /tools/perf/scripts/python
parent075b74841bd0065a3bda3440873c747938e69b68 (diff)
ASoC: sgtl5000: sort the register default table
reg_defaults must be sorted by ascending register address, as regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays"). SGTL5000_CHIP_SHORT_CTRL (0x003c) is listed before SGTL5000_CHIP_ANA_TEST2 (0x003a), which makes the former unreachable. regcache_reg_needs_sync() then cannot compare it against its default and reports that a sync is needed, so it is written to the device on every regcache_sync() even when it was never touched. Sort the table by register address. Fixes: 29aa37cddfb9 ("ASoC: sgtl5000: Fix the cache handling") Cc: stable@vger.kernel.org Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Link: https://patch.msgid.link/20260805122728.12362-2-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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