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authorBiju Das <biju.das.jz@bp.renesas.com>2026-03-25 19:24:17 +0000
committerThomas Gleixner <tglx@kernel.org>2026-03-26 16:56:20 +0100
commit3aa78b828e5d68bc8231a70ed295bcc6227bc611 (patch)
tree46483dc3af39411650a3949753a62743e224611d /tools/perf/scripts/python
parent7b7d32d93e9879480ec6f00b9310b2d64c2161db (diff)
dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G3L SoC
Document RZ/G3L (R9A08G046) IRQC. The IRQC block on the RZ/G3L SoC is nearly identical to that found on the RZ/G3S SoC, with the following differences: it supports more external interrupts and GPT error interrupts, and adds registers for GPT/MTU interrupt selection and shared interrupt selection between external interrupt and TINT. A new compatible string "renesas,r9a08g046-irqc" is therefore introduced for the RZ/G3L SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260325192451.172562-3-biju.das.jz@bp.renesas.com
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