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authorRui Qi <qirui.001@bytedance.com>2026-07-06 21:04:14 +0800
committerPaul Walmsley <pjw@kernel.org>2026-07-13 11:38:56 -0600
commit3a2694bf6ac8e47b3814293e80343f58fc72937f (patch)
tree16c779ec62f50dfdb35fda0d8d39873054ea04ff /tools/perf/scripts/python
parent4edd70ee6a7d0408a4e3ac921185779e7605f29c (diff)
riscv: Gate FUNCTION_ALIGNMENT_4B on DYNAMIC_FTRACE
The FUNCTION_ALIGNMENT_4B select forces the whole kernel to be built with -fmin-function-alignment=4. This alignment is only needed so the patchable-function-entry NOPs, which arch/riscv/Makefile emits under CONFIG_DYNAMIC_FTRACE, can be patched reliably on RISCV_ISA_C=y builds where compressed instructions otherwise allow 2-byte function alignment. The select is currently gated on HAVE_DYNAMIC_FTRACE, a capability bit that is selected whenever the toolchain supports dynamic ftrace, rather than on whether tracing is actually enabled. As a result every RISCV_ISA_C=y build gets 4-byte function alignment across the entire kernel even when function tracing is disabled, needlessly growing the kernel image and wasting instruction cache for a feature that is not in use. Gate the select on DYNAMIC_FTRACE instead, matching the condition under which arch/riscv/Makefile emits -fpatchable-function-entry, so the alignment is only applied when it is actually needed. Fixes: c41bf4326c7b ("riscv: ftrace: align patchable functions to 4 Byte boundary") Signed-off-by: Rui Qi <qirui.001@bytedance.com> Link: https://patch.msgid.link/20260706130415.463682-1-qirui.001@bytedance.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
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