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authorDibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>2026-06-16 21:51:46 +0530
committerAnimesh Manna <animesh.manna@intel.com>2026-06-17 18:07:50 +0530
commitd75ea53314db7a8265e5235031b487766779d73c (patch)
tree31ff2fa3abeaac6a4a86f05286d70f54333d34a3 /tools/perf/scripts/python/task-analyzer.py
parent7741043a459a5401d102c38a26ab1686b35ecca0 (diff)
drm/i915/display: Add DC3CO compute and set target state in commit tail
Compute if dc3co is allowed in intel_atomic_commit_tail() based on pipe/port constraints and runtime triggers and store result in display->power.dc3co. When DC3CO can be enabled, request DC_STATE_EN_UPTO_DC3CO and reduce the DC entry delay. Otherwise, retain the existing delay and set default DC_STATE_EN_UPTO_DC6. Changes in v2: - Move DC3CO compute logic from intel_atomic_check() to intel_atomic_commit_tail as it is not advisable to change persistent state in atomic check (Jani Nikula) - Add psr2 deep sleep check in dc3co compute. - Move allowed computation logic inside dc3co update (Jani Nikula). - Add dc3co support check in dc3co allowed function (Jani Nikula) - Move all dc3co functions to intel_display_power.c and rename functions accordingly (Jani Nikula) - Clean up dc3co/dc6 power async delay in intel_atomic_commit_tail() (Jani Nikula) Changes in v3: - Remove debug print from intel_display_power_dc3co_update() BSpec: 75253 Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Link: https://patch.msgid.link/20260616162154.2630995-9-dibin.moolakadan.subrahmanian@intel.com
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