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authorSherry Sun <sherry.sun@nxp.com>2026-02-05 15:34:53 +0800
committerFrank Li <Frank.Li@nxp.com>2026-03-02 11:16:11 -0500
commitd1e7eab6033f9885a02c4b4e8f09e34d8e9d21ab (patch)
tree909c13e6f4a50d9665cdd9a3af02e6e3cf860158 /tools/perf/scripts/python/task-analyzer.py
parent51c0c3d880acc45a9b57d505195d93541b38b3f5 (diff)
arm64: dts: imx8mp-evk: Enable pull select bit for PCIe regulator GPIO (M.2 W_DISABLE1)
The current pin configuration for MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 sets the weak pull-up but does not enable the pull select field. Bit 8 in the IOMUX register must be set in order for the weak pull-up to actually take effect. Update the pinctrl setting from 0x40 to 0x140 to enable both the pull select and the weak pull-up, ensuring the line behaves as expected. Fixes: d50650500064 ("arm64: dts: imx8mp-evk: Add PCIe support") Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
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