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authorVaradarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>2026-07-21 13:05:26 +0530
committerVinod Koul <vkoul@kernel.org>2026-07-22 13:53:06 +0530
commit9bc73298911064f405e6252ab30ce0ed978ab800 (patch)
tree7cd786b4976a6f657e40698f0545574068c3f2cd /tools/perf/scripts/python/task-analyzer.py
parentedb7772bb3b5ebd5e8efacfaabaade643fc4b77b (diff)
dt-bindings: phy: qcom,ipq8074-qmp-pcie: Document the ipq5210 QMP PCIe PHY
The ipq5210 has one dual lane and one single lane PCIe phy. The dual lane phy is similar to the dual lane phy present in ipq9574. Hence qcom,ipq5210-qmp-gen3x2-pcie-phy is documented with ipq9574's dual lane phy as fallback compatible. The single lane phy (qcom,ipq5210-qmp-gen3x1-pcie-phy) is documented as specific compatible as it uses a combination of its own initialization tables and some of the existing tables. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com> Link: https://patch.msgid.link/20260721-pcie-phy-v5-1-8d403ef7e780@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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