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authorBiju Das <biju.das.jz@bp.renesas.com>2026-07-29 13:54:59 +0100
committerBiju Das <biju.das.jz@bp.renesas.com>2026-08-05 14:08:35 +0100
commit7b7009e7009a90158a25f1850e166735a70b1299 (patch)
tree609a70611b851670a4ea5e02116762b911eaef6b /tools/perf/scripts/python/task-analyzer.py
parenta4377c7722b824d3d2eb940eb681cf37b0969a24 (diff)
dt-bindings: display: renesas,rzg2l-du: Document RZ/G3L SoC
The DU block on the RZ/G3L SoC is identical to the one found on the RZ/G2L SoC. However, it supports the DSI, DPI, and LVDS interfaces, while the RZ/G2L supports only the DSI and DPI interfaces. Due to this difference, a SoC-specific compatible string, 'renesas,r9a08g046-du', is added for the RZ/G3L SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260729125516.230757-8-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
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