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| author | Lee Shawn C <shawn.c.lee@intel.com> | 2021-09-08 19:56:05 +0800 |
|---|---|---|
| committer | Vandita Kulkarni <vandita.kulkarni@intel.com> | 2021-09-08 19:34:39 +0530 |
| commit | fe01883fdcefd09c7ceb91874c2f74ae074163d6 (patch) | |
| tree | fc3903591abb5731f1a3dcfdbbf495c21b83aade /tools/perf/scripts/python/stackcollapse.py | |
| parent | 5ebd50d3948ee596db02399a09b4561ed82aee57 (diff) | |
drm/i915: Get proper min cdclk if vDSC enabled
VDSC engine can process only 1 pixel per Cd clock. In case
VDSC is used and max slice count == 1, max supported pixel
clock should be 100% of CD clock. Then do min_cdclk and
pixel clock comparison to get proper min cdclk.
v2:
- Check for dsc enable and slice count ==1 then allow to
double confirm min cdclk value.
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: William Tseng <william.tseng@intel.com>
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210908115607.9633-4-shawn.c.lee@intel.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions