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| author | Matthew Stewart <Matthew.Stewart2@amd.com> | 2026-06-24 14:59:20 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-07-14 19:12:35 -0400 |
| commit | fd651b9a3be9e7aba98ac2afacbf10b541d9ba00 (patch) | |
| tree | f590a530605b006119f6c7ebdd27cabc335a623b /tools/perf/scripts/python/stackcollapse.py | |
| parent | b6f466c509ad2f390b3fc91cd0de4783554f5f98 (diff) | |
drm/amd/display: Add DCN42B VID_CRC_CONTROL and HBLANK_CONTROL registers
[why]
These registers are needed by our existing code.
[how]
Add the missing register defines to dcn42b_resource.c.
Remove DCN42B variant of HP_DP_STREAM_ENC_REG_LIST_RI as it is now the
same as the DCN42B one, when these registers are included.
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Matthew Stewart <Matthew.Stewart2@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions