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authorGautham R. Shenoy <gautham.shenoy@amd.com>2026-03-26 17:17:46 +0530
committerMario Limonciello (AMD) <superm1@kernel.org>2026-04-02 11:28:12 -0500
commitfcc25a291fbdca2c06c2c6602532050873f0c9de (patch)
tree3a4bcc17f29b0a0fc4100734357cce65f97dd2ce /tools/perf/scripts/python/stackcollapse.py
parentbeda3b363546a423e4e29a7395e04c0ac4ff677e (diff)
amd-pstate: Update cppc_req_cached in fast_switch case
The function msr_update_perf() does not cache the new value that is written to MSR_AMD_CPPC_REQ into the variable cpudata->cppc_req_cached when the update is happening from the fast path. Fix that by caching the value everytime the MSR_AMD_CPPC_REQ gets updated. This issue was discovered by Claude Opus 4.6 with the aid of Chris Mason's AI review-prompts (https://github.com/masoncl/review-prompts/tree/main/kernel). Assisted-by: Claude:claude-opus-4.6 review-prompts/linux Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Fixes: fff395796917 ("cpufreq/amd-pstate: Always write EPP value when updating perf") Signed-off-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
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