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| author | Nicolas Frattaroli <nicolas.frattaroli@collabora.com> | 2026-06-09 14:43:58 +0200 |
|---|---|---|
| committer | Daniel Stone <daniels@collabora.com> | 2026-06-09 21:03:51 +0100 |
| commit | f424f307de42b3ab6a29c89f54084a5db7b78026 (patch) | |
| tree | 44580148e3a74df57b28f6c253eff4d2d8255daf /tools/perf/scripts/python/stackcollapse.py | |
| parent | 8a0343b03b98a5629fa90577dbfb0b7ef68c19a5 (diff) | |
drm/rockchip: Add YUV422 output mode constants for VOP2
The Rockchip display controller has a general YUV422 output mode, and
some SoC-specific connector-specific output modes for RK3576.
Add them, based on the values in downstream and the TRM (dsp_out_mode in
RK3576 TRM Part 2, register POST*_CTRL_POST_DSP_CTRL).
Reviewed-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Daniel Stone <daniel@fooishbar.org>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://patch.msgid.link/20260609-color-format-v17-11-35739b5782cc@collabora.com
Signed-off-by: Daniel Stone <daniels@collabora.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions