diff options
| author | Luo Jie <jie.luo@oss.qualcomm.com> | 2026-01-06 21:35:13 -0800 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-07-06 20:38:03 -0500 |
| commit | eba1bea1123924f8bf187ad175d1667036f34e80 (patch) | |
| tree | f6f2bbd68a6c77d49dfe78009eeb28ce4ad8be5b /tools/perf/scripts/python/stackcollapse.py | |
| parent | a8fd72fcf305534f0a8da095de2cce467b73e66c (diff) | |
arm64: dts: qcom: ipq5332: Add CMN PLL node for networking hardware
Add the CMN PLL node required for networking hardware operation on IPQ5332.
The CMN PLL core runs at 6 GHz on this platform, differing from others like
IPQ9574.
Configure the reference clock path where XO (48 MHz or 96 MHz) routes
through the WiFi block's multiplier/divider to provide a stable 48 MHz
reference to the CMN PLL.
.XO (48 MHZ or 96 MHZ)-->WiFi (multiplier/divider)--> 48 MHZ to CMN PLL.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Luo Jie <jie.luo@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260106-qcom_ipq5332_cmnpll-v2-4-f9f7e4efbd79@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions
