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| author | Peter Ujfalusi <peter.ujfalusi@linux.intel.com> | 2026-08-05 11:24:11 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-08-05 13:34:34 +0100 |
| commit | d74aac116cfb2058b15df53996d23232b310f7ff (patch) | |
| tree | 876fc1c16ebf99f509c2bf89f437e9b16a6252dd /tools/perf/scripts/python/stackcollapse.py | |
| parent | 075b74841bd0065a3bda3440873c747938e69b68 (diff) | |
ASoC: cs35l41: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit
fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
cs35l41_reg[] lists CS35L41_BSTCVRT_PEAK_CUR (0x3808) after
CS35L41_BSTCVRT_COEFF (0x3810) and CS35L41_BSTCVRT_SLOPE_LBST (0x3814), so
the binary search does not find those two entries.
regcache_reg_needs_sync() then cannot compare them against their default
and reports that a sync is needed, so they are written to the device on
every regcache_sync() even when they were never touched.
Sort the table by register address.
Fixes: 5f2f539901b0 ("ASoC: cs35l41: Correct handling of some registers in the cache")
Cc: stable@vger.kernel.org
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Reviewed-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Link: https://patch.msgid.link/20260805082413.26174-2-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions
