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authorBiju Das <biju.das.jz@bp.renesas.com>2026-03-28 10:33:18 +0000
committerThomas Gleixner <tglx@kernel.org>2026-03-31 18:25:29 +0200
commitd3689cd02c5de52ff5f3044169c482aee0dd5a78 (patch)
tree20a556cfdb416ed867cbf1deb74fb5f333890e83 /tools/perf/scripts/python/stackcollapse.py
parent9fd2170d70178faa0427adaa9d2dfdbfa231d1b7 (diff)
irqchip/renesas-rzg2l: Clear the shared interrupt bit in rzg2l_irqc_free()
rzg2l_irqc_free() invokes irq_domain_free_irqs_common(), which internally calls irq_domain_reset_irq_data(). That explicitly sets irq_data->hwirq to 0. Consequently, irqd_to_hwirq(d) returns 0 when called after it. Since 0 falls outside the valid shared IRQ ranges, rzg2l_irqc_is_shared_and_get_irq_num() evaluates to false, completely bypassing the test_and_clear_bit() operation. This leaves the bit set in priv->used_irqs, causing future allocations to fail with -EBUSY. Fix this by retrieving irq_data and caching hwirq before calling irq_domain_free_irqs_common(). Fixes: e0fcae27ff57 ("irqchip/renesas-rzg2l: Add shared interrupt support") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Link: https://patch.msgid.link/20260328103324.134131-2-biju.das.jz@bp.renesas.com
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