diff options
| author | Daniil Agalakov <ade@amicon.ru> | 2026-07-15 15:58:48 +0300 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2026-07-24 15:33:27 -0700 |
| commit | bf8cdde4ef35b47cff5611a2a7062ac6a64fa7ff (patch) | |
| tree | 6a5d746f76630dbf4b0a38995b4ee54076e47874 /tools/perf/scripts/python/stackcollapse.py | |
| parent | be6f0d0bae229ebd03e9bfe736f78e2d6b35885f (diff) | |
net: hns: use u32 for register offset in RCB TX coalescing
In both hns_rcb_get_tx_coalesced_frames() and
hns_rcb_set_tx_coalesced_frames(), the local variable reg holds a
register offset passed to dsaf_read_dev() or dsaf_write_dev().
Register offsets on this hardware are 32-bit values. Use u32 for reg
to match the register access interfaces and avoid implying that
64-bit offsets are supported.
Signed-off-by: Daniil Agalakov <ade@amicon.ru>
Signed-off-by: Daniil Iskhakov <dish@amicon.ru>
Link: https://patch.msgid.link/20260715125856.19346-1-dish@amicon.ru
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions