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authorPeter Ujfalusi <peter.ujfalusi@linux.intel.com>2026-08-05 15:28:09 +0300
committerMark Brown <broonie@kernel.org>2026-08-07 15:57:46 +0100
commitb927853f70078262780a4e623631584a25eb7284 (patch)
treeb02d089c44c3fa5853a8c09088b59435f3cf44cb /tools/perf/scripts/python/stackcollapse.py
parentd4d0e6e2355a6fe6517e5a0c3d9a0b8ab073b0b6 (diff)
ASoC: cx2072x: sort the register default table
reg_defaults must be sorted by ascending register address, as regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays"). The table is grouped by function rather than by address: for every node the amplifier gain registers (0x41c0, 0x45c0, ...) are listed before the power state and stream format registers of the same node (0x4014, 0x4414, ...). This leaves 75 of the 132 entries unreachable. regcache_reg_needs_sync() then cannot compare them against their default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched. Sort the table by register address. Fixes: a497a4363706 ("ASoC: Add support for Conexant CX2072X CODEC") Cc: stable@vger.kernel.org Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Link: https://patch.msgid.link/20260805122811.13713-3-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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