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authorAhmed Naseef <naseefkm@gmail.com>2026-08-04 14:33:21 +0400
committerJakub Kicinski <kuba@kernel.org>2026-08-07 16:30:28 -0700
commitb6e2649fff15a17689851b30e5415a3aae2b516e (patch)
treebadc9da19820a70bc4ba35b4ed8516dd5c3c72f3 /tools/perf/scripts/python/stackcollapse.py
parent3a30302b939152e4bb810fec1378613a3c6f5a97 (diff)
net: phy: mediatek: add EcoNet EN7528 PHY support
The EcoNet EN7528 MIPS SoC embeds four Gigabit Ethernet PHYs (PHY ID 0x03a29491) behind its built-in MT7530 switch. They use the same LED register layout as the other SoC PHYs handled by this driver, but their LED controller powers up with its external control disabled, so the LED pins stay dark regardless of what is programmed into the LED control registers. Add a phy_driver entry for it, modelled on the Airoha AN7583 one. Its config_init callback enables the LED controller through the LED basic control register, which this driver does not program for its other PHYs, but which the air_en8811h driver already handles as AIR_PHY_LED_BCR. LED behaviour is then controlled through the phylib LED operations shared with the other PHYs of this driver. The LED block is shared by the four PHYs of the EN7528: the LED configuration programmed through any one of them applies to all four, while each PHY still drives its own LED pin from its own link state. The EN7528 PHYs need no efuse calibration data, so relax the MEDIATEK_GE_SOC_PHY dependencies to allow building the driver on the ECONET platform. Signed-off-by: Ahmed Naseef <naseefkm@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20260804103321.3331802-1-naseefkm@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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