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| author | Senchuan Zhang <zhangsenchuan@eswincomputing.com> | 2026-02-27 19:18:08 +0800 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2026-03-19 16:40:03 -0500 |
| commit | b593c26d081a4fbeabd34badb0a9e9a971a79cb4 (patch) | |
| tree | 2a9d9778f6211642b25f64c7e63e81fcbb62dd7d /tools/perf/scripts/python/stackcollapse.py | |
| parent | 249c48a55856245d5f6dcfd53e1e15fb5d0c467b (diff) | |
PCI: eswin: Add ESWIN PCIe Root Complex driver
Add driver for the ESWIN PCIe Root Complex based on the DesignWare PCIe
core, IP revision 5.96a. The PCIe Gen.3 Root Complex supports data rate of
8 GT/s and x4 lanes, with INTx and MSI interrupt capability.
Signed-off-by: Yu Ning <ningyu@eswincomputing.com>
Signed-off-by: Yanghui Ou <ouyanghui@eswincomputing.com>
Signed-off-by: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
[mani: renamed "EIC7700" to "ESWIN", added maintainers entry, removed async probe]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
[bhelgaas: add driver tag in subject]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patch.msgid.link/20260227111808.1996-1-zhangsenchuan@eswincomputing.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions