diff options
| author | Yang Wang <kevinyang.wang@amd.com> | 2026-06-23 16:36:21 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-07-01 11:28:09 -0400 |
| commit | 9914149f99fd2ddcfd2a8c1053a57d96ec43448e (patch) | |
| tree | 0fdcef4052f6923169a8e1d6819f19b72aef840d /tools/perf/scripts/python/stackcollapse.py | |
| parent | 0ceb6bc43e62f0e73b282c9de8f4bc4d5498f281 (diff) | |
drm/amd/pm: Validate Vega10 PPTable subtable bounds
v1:
Vega10 PPTable parsing uses VBIOS-provided offsets, revision fields
and entry counts to locate subtables. Malformed data can otherwise
drive out-of-bounds reads from soft_pp_table_size, and voltage lookup
tables can overrun their fixed-size destination arrays.
Add shared bounds helpers and validate fixed-size subtables, dynamic
entry arrays and revision-specific layouts before consuming thermal,
fan, power-tune, clock dependency, PCIE, hard-limit and voltage lookup
data.
v2:
if ucRevId is not matched, fallback to default table size instead of returning -EINVAL.
Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions
